[PATCH] Fix build errors introduced by r235215

[Pirama Arumuga Nainar]

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D9086

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
  llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Index: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
@@ -50,6 +50,9 @@
     case TargetLowering::TypeLegal:
     case TargetLowering::TypePromoteInteger:
       break;
+    case TargetLowering::TypePromoteFloat:
+      llvm_unreachable("Bitcast of a promotion-needing float should never need"
+                       "expansion");
     case TargetLowering::TypeSoftenFloat:
       // Convert the integer operand instead.
       SplitInteger(GetSoftenedFloat(InOp), Lo, Hi);
Index: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
@@ -1626,9 +1626,8 @@
   SDValue Op = N->getOperand(0);
   EVT OpVT = Op->getValueType(0);
 
-  EVT VT = N->getValueType(0);
   EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
-  assert (IVT == VT && "Bitcast to type of different size");
+  assert (IVT == N->getValueType(0) && "Bitcast to type of different size");
 
   SDValue Promoted = GetPromotedFloat(N->getOperand(0));
   EVT PromotedVT = Promoted->getValueType(0);
Index: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -723,6 +723,7 @@
   switch (getTypeAction(InVT)) {
   case TargetLowering::TypeLegal:
   case TargetLowering::TypePromoteInteger:
+  case TargetLowering::TypePromoteFloat:
   case TargetLowering::TypeSoftenFloat:
   case TargetLowering::TypeScalarizeVector:
   case TargetLowering::TypeWidenVector:
@@ -2133,6 +2134,7 @@
       return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
     break;
   case TargetLowering::TypeSoftenFloat:
+  case TargetLowering::TypePromoteFloat:
   case TargetLowering::TypeExpandInteger:
   case TargetLowering::TypeExpandFloat:
   case TargetLowering::TypeScalarizeVector:

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