[llvm] r234372 - AArch64: disallow "fmov sD, #-0.0" during assembly.

[Tim Northover]

Author: tnorthover
Date: Tue Apr  7 17:49:47 2015
New Revision: 234372

URL: http://llvm.org/viewvc/llvm-project?rev=234372&view=rev
Log:
AArch64: disallow "fmov sD, #-0.0" during assembly.

We weren't checking the sign of the floating point immediate before translating
it to "fmov sD, wzr". Similarly for D-regs.

Technically "movi vD.2s, #0x80, lsl #24" would work most of the time, but it's
not a blessed alias (and I don't think it should be since people expect writing
sD to zero out the high lanes, and there's no dD equivalent). So an error it is.

rdar://20455398

Added:
    llvm/trunk/test/MC/AArch64/arm64-fp-encoding-error.s
Modified:
    llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp

Modified: llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp?rev=234372&r1=234371&r2=234372&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp Tue Apr  7 17:49:47 2015
@@ -2090,15 +2090,16 @@ AArch64AsmParser::tryParseFPImm(OperandV
   const AsmToken &Tok = Parser.getTok();
   if (Tok.is(AsmToken::Real)) {
     APFloat RealVal(APFloat::IEEEdouble, Tok.getString());
+    if (isNegative)
+      RealVal.changeSign();
+
     uint64_t IntVal = RealVal.bitcastToAPInt().getZExtValue();
-    // If we had a '-' in front, toggle the sign bit.
-    IntVal ^= (uint64_t)isNegative << 63;
     int Val = AArch64_AM::getFP64Imm(APInt(64, IntVal));
     Parser.Lex(); // Eat the token.
     // Check for out of range values. As an exception, we let Zero through,
     // as we handle that special case in post-processing before matching in
     // order to use the zero register for it.
-    if (Val == -1 && !RealVal.isZero()) {
+    if (Val == -1 && !RealVal.isPosZero()) {
       TokError("expected compatible register or floating-point constant");
       return MatchOperand_ParseFail;
     }

Added: llvm/trunk/test/MC/AArch64/arm64-fp-encoding-error.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AArch64/arm64-fp-encoding-error.s?rev=234372&view=auto
==============================================================================
--- llvm/trunk/test/MC/AArch64/arm64-fp-encoding-error.s (added)
+++ llvm/trunk/test/MC/AArch64/arm64-fp-encoding-error.s Tue Apr  7 17:49:47 2015
@@ -0,0 +1,8 @@
+; RUN: not llvm-mc -triple arm64-apple-ios8.0 %s -o /dev/null 2>&1 | FileCheck %s
+
+        fmov s0, #-0.0
+; CHECK: error: expected compatible register or floating-point constant
+
+        fmov d0, #-0.0
+; CHECK: error: expected compatible register or floating-point constant
+