[PATCH] [X86][SSE] Use (V)PINSRB for direct byte insertion in 16i8 buildvector on SSE4.1 targets

[Simon Pilgrim]

Hi qcolombet, chandlerc, andreadb, spatel,

This patch allows SSE4.1 targets to use (V)PINSRB to create 16i8 vectors by inserting i8 scalars directly into a XMM register instead of merging pairs of i8 scalars into a i16 and using the SSE2 PINSRW instruction.

This allows folding of byte loads and reduces scalar register usage as well.

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D8839

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/vec_cast2.ll
  test/CodeGen/X86/vector-shuffle-128-v16.ll

EMAIL PREFERENCES
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