[PATCH] RegAllocGreedy: Improve live interval order in ReverseLocal mode

Phabricator reviews at reviews.llvm.org
Tue Mar 31 13:00:45 PDT 2015


REPOSITORY
  rL LLVM

http://reviews.llvm.org/D8625

Files:
  llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp

Index: llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
+++ llvm/trunk/lib/CodeGen/RegAllocGreedy.cpp
@@ -552,7 +552,7 @@
         // Allocating bottom up may allow many short LRGs to be assigned first
         // to one of the cheap registers. This could be much faster for very
         // large blocks on targets with many physical registers.
-        Prio = Indexes->getZeroIndex().getInstrDistance(LI->beginIndex());
+        Prio = Indexes->getZeroIndex().getInstrDistance(LI->endIndex());
       }
     }
     else {

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