[rfc/patch][pr 22995] Swapped register order of "cmp" instructions

[Rafael Espíndola]

> I can't say anything about reasons, but this doesn't seem like a
> printing issue, rather one of default encoding?  There's 38/39 for "r/m,
> r", and 3A/3B for "r, r/m":  I guess MC and GAS don't agree on that.

The encoding is different, but the instructions are symmetrical.

>>>> Any suggestions for a better name for BinOpRR2? Should I just "inline"
>>>> it in the single use?
>
> That's what the _REV classes are for, no?  If you switch BaseOpc and
> BaseOpc2 passed to *rr* in ArithBinOp_F, does that have the same
> effect?

I only see _REV defs, no classes in X86InstrArithmetic.td.

Not sure I follow what you mean by the switch in ArithBinOp_F. The
test instructions are created in

--------------------------------------------
let isCompare = 1 in {
  let Defs = [EFLAGS] in {
    let isCommutable = 1 in {
      def TEST8rr  : BinOpRR_F<0x84, "test", Xi8 , X86testpat, MRMSrcReg>;
      def TEST16rr : BinOpRR_F<0x84, "test", Xi16, X86testpat, MRMSrcReg>;
      def TEST32rr : BinOpRR_F<0x84, "test", Xi32, X86testpat, MRMSrcReg>;
      def TEST64rr : BinOpRR_F<0x84, "test", Xi64, X86testpat, MRMSrcReg>;
----------------------------------------------

No?

Cheers,
Rafael