[PATCH] [AArch64] enable rematerialization of float 0 values

Tim Northover t.p.northover at gmail.com
Fri Mar 20 11:29:57 PDT 2015

Hi Geoff,

> -def : Pat<(f32 (fpimm0)), (FMOVWSr WZR)>, Requires<[NoZCZ]>; -def :
> Pat<(f64 (fpimm0)), (FMOVXDr XZR)>, Requires<[NoZCZ]>;
> +// Add separate opcode for FMOV 0 so we can mark it as
> +isReMaterializable let isReMaterializable = 1, isCodeGenOnly = 1 in
> +defm FMOV0 : UnscaledConversion<"fmov">;
> +
> +def : Pat<(f32 (fpimm0)), (FMOV0WSr WZR)>, Requires<[NoZCZ]>; def :
> +Pat<(f64 (fpimm0)), (FMOV0XDr XZR)>, Requires<[NoZCZ]>;

The idea of a more targeted pseudo-instruction is probably a good one.
But that particular implementation creates loads of heavy-weight
Pseudo-instructions (encoding info, asm info, ...), most of which are
never used.

I'd suggest something along the lines of:

let isReMaterializable = 1, isCodeGenOnly = 1 in {

def FMOVS0: Pseudo<(outs FPR32:$Rd), (ins), [(set f32:$Rd, (fpimm0))]>,
      PseudoInstExpansion<(FMOVWSr FPR32:$Rd, WZR)>,

<similar FMOVD0>

Also, there's still no test.



More information about the llvm-commits mailing list