[lld] r232755 - [Mips] Implement R_MIPS_PC19_S2 / R_MIPS_PC26_S2 relocations handling
Eric Christopher
echristo at gmail.com
Thu Mar 19 13:12:34 PDT 2015
Hi Simon,
Bit of a drive by review, but could you (would you) add in some comments of
what the relocation calculation actually does above the implementation?
Similar to table 4-11 in
http://math-atlas.sourceforge.net/devel/assembly/mipsabi32.pdf at least?
-eric
On Thu, Mar 19, 2015 at 1:08 PM Simon Atanasyan <simon at atanasyan.com> wrote:
> Author: atanasyan
> Date: Thu Mar 19 14:58:58 2015
> New Revision: 232755
>
> URL: http://llvm.org/viewvc/llvm-project?rev=232755&view=rev
> Log:
> [Mips] Implement R_MIPS_PC19_S2 / R_MIPS_PC26_S2 relocations handling
>
> Added:
> lld/trunk/test/elf/Mips/rel-pc19-s2.test
> lld/trunk/test/elf/Mips/rel-pc26-s2.test
> Modified:
> lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
>
> Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
> URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/
> ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp?rev=
> 232755&r1=232754&r2=232755&view=diff
> ============================================================
> ==================
> --- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
> (original)
> +++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp Thu Mar
> 19 14:58:58 2015
> @@ -65,8 +65,12 @@ static MipsRelocationParams getRelocatio
> case R_MIPS_26:
> case LLD_R_MIPS_GLOBAL_26:
> return {4, 0x3ffffff, 2, false};
> + case R_MIPS_PC19_S2:
> + return {4, 0x7ffff, 2, false};
> case R_MIPS_PC21_S2:
> return {4, 0x1fffff, 2, false};
> + case R_MIPS_PC26_S2:
> + return {4, 0x3ffffff, 2, false};
> case R_MIPS_HI16:
> case R_MIPS_LO16:
> case R_MIPS_GPREL16:
> @@ -221,6 +225,14 @@ static uint32_t relocGPRel32(uint64_t S,
> return result;
> }
>
> +/// \brief R_MIPS_PC19_S2
> +static uint32_t relocPc19(uint64_t P, uint64_t S, int64_t A) {
> + A = llvm::SignExtend32<21>(A);
> + // FIXME (simon): Check that S + A has 4-byte alignment
> + int32_t result = S + A - P;
> + return result >> 2;
> +}
> +
> /// \brief R_MIPS_PC21_S2
> static uint32_t relocPc21(uint64_t P, uint64_t S, int64_t A) {
> A = llvm::SignExtend32<23>(A);
> @@ -229,6 +241,14 @@ static uint32_t relocPc21(uint64_t P, ui
> return result >> 2;
> }
>
> +/// \brief R_MIPS_PC26_S2
> +static uint32_t relocPc26(uint64_t P, uint64_t S, int64_t A) {
> + A = llvm::SignExtend32<28>(A);
> + // FIXME (simon): Check that S + A has 4-byte alignment
> + int32_t result = S + A - P;
> + return result >> 2;
> +}
> +
> /// \brief R_MICROMIPS_PC7_S1
> static uint32_t relocPc7(uint64_t P, uint64_t S, int64_t A) {
> A = llvm::SignExtend32<8>(A);
> @@ -361,8 +381,12 @@ static ErrorOr<uint64_t> calculateReloca
> return relocGOT(tgtAddr, gpAddr);
> case R_MIPS_GOT_OFST:
> return relocGOTOfst(tgtAddr, ref.addend());
> + case R_MIPS_PC19_S2:
> + return relocPc19(relAddr, tgtAddr, ref.addend());
> case R_MIPS_PC21_S2:
> return relocPc21(relAddr, tgtAddr, ref.addend());
> + case R_MIPS_PC26_S2:
> + return relocPc26(relAddr, tgtAddr, ref.addend());
> case R_MICROMIPS_PC7_S1:
> return relocPc7(relAddr, tgtAddr, ref.addend());
> case R_MICROMIPS_PC10_S1:
>
> Added: lld/trunk/test/elf/Mips/rel-pc19-s2.test
> URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/
> Mips/rel-pc19-s2.test?rev=232755&view=auto
> ============================================================
> ==================
> --- lld/trunk/test/elf/Mips/rel-pc19-s2.test (added)
> +++ lld/trunk/test/elf/Mips/rel-pc19-s2.test Thu Mar 19 14:58:58 2015
> @@ -0,0 +1,54 @@
> +# Check handling of R_MIPS_PC19_S2 relocation.
> +
> +# RUN: yaml2obj -format=elf %s > %t.o
> +# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o
> +# RUN: llvm-objdump -s -t %t.exe | FileCheck %s
> +
> +# CHECK: Contents of section .text:
> +# CHECK-NEXT: 400110 01000000 00000000 00000000
> +# ^ V
> +# A = -1 << 2 = -4 =>
> +# V = (T1 - 4 - T0) >> 2 =>
> +# V => 4 >> 2 = 1
> +
> +# CHECK: SYMBOL TABLE:
> +# CHECK: 00400110 g F .text 00000008 T0
> +# CHECK: 00400118 g F .text 00000004 T1
> +
> +FileHeader:
> + Class: ELFCLASS32
> + Data: ELFDATA2LSB
> + Type: ET_REL
> + Machine: EM_MIPS
> + Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6]
> +
> +Sections:
> +- Name: .text
> + Type: SHT_PROGBITS
> + Content: "ffff07000000000000000000"
> +# ^ T1
> +# ^ T0 A := 0x7ffff == -1
> + AddressAlign: 16
> + Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
> +
> +- Name: .rel.text
> + Type: SHT_REL
> + Info: .text
> + AddressAlign: 4
> + Relocations:
> + - Offset: 0
> + Symbol: T1
> + Type: R_MIPS_PC19_S2
> +
> +Symbols:
> + Global:
> + - Name: T0
> + Section: .text
> + Type: STT_FUNC
> + Value: 0
> + Size: 8
> + - Name: T1
> + Section: .text
> + Type: STT_FUNC
> + Value: 8
> + Size: 4
>
> Added: lld/trunk/test/elf/Mips/rel-pc26-s2.test
> URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/
> Mips/rel-pc26-s2.test?rev=232755&view=auto
> ============================================================
> ==================
> --- lld/trunk/test/elf/Mips/rel-pc26-s2.test (added)
> +++ lld/trunk/test/elf/Mips/rel-pc26-s2.test Thu Mar 19 14:58:58 2015
> @@ -0,0 +1,54 @@
> +# Check handling of R_MIPS_PC26_S2 relocation.
> +
> +# RUN: yaml2obj -format=elf %s > %t.o
> +# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o
> +# RUN: llvm-objdump -s -t %t.exe | FileCheck %s
> +
> +# CHECK: Contents of section .text:
> +# CHECK-NEXT: 400110 01000000 00000000 00000000
> +# ^ V
> +# A = -1 << 2 = -4 =>
> +# V = (T1 - 4 - T0) >> 2 =>
> +# V => 4 >> 2 = 1
> +
> +# CHECK: SYMBOL TABLE:
> +# CHECK: 00400110 g F .text 00000008 T0
> +# CHECK: 00400118 g F .text 00000004 T1
> +
> +FileHeader:
> + Class: ELFCLASS32
> + Data: ELFDATA2LSB
> + Type: ET_REL
> + Machine: EM_MIPS
> + Flags: [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32R6]
> +
> +Sections:
> +- Name: .text
> + Type: SHT_PROGBITS
> + Content: "ffffff030000000000000000"
> +# ^ T1
> +# ^ T0 A := 0x3ffffff == -1
> + AddressAlign: 16
> + Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
> +
> +- Name: .rel.text
> + Type: SHT_REL
> + Info: .text
> + AddressAlign: 4
> + Relocations:
> + - Offset: 0
> + Symbol: T1
> + Type: R_MIPS_PC26_S2
> +
> +Symbols:
> + Global:
> + - Name: T0
> + Section: .text
> + Type: STT_FUNC
> + Value: 0
> + Size: 8
> + - Name: T1
> + Section: .text
> + Type: STT_FUNC
> + Value: 8
> + Size: 4
>
>
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