[PATCH] [mips] Distinguish 'R', 'ZC', and 'm' inline assembly memory constraint.

[Daniel Sanders]

Hi vkalintiris,

Previous behaviour of 'R' and 'm' has been preserved for now. They will be
improved in subsequent commits.

The offset permitted by ZC varies according to the subtarget since it is
intended to match the restrictions of the pref, ll, and sc instructions.

The restrictions on these instructions are:
* For microMIPS: 12-bit signed offset.
* For Mips32r6/Mips64r6: 9-bit signed offset.
* Otherwise: 16-bit signed offset.

http://reviews.llvm.org/D8414

Files:
  include/llvm/IR/InlineAsm.h
  lib/Target/Mips/MipsAsmPrinter.cpp
  lib/Target/Mips/MipsISelDAGToDAG.cpp
  lib/Target/Mips/MipsISelLowering.cpp
  lib/Target/Mips/MipsISelLowering.h
  lib/Target/Mips/MipsSEISelDAGToDAG.cpp
  lib/Target/Mips/MipsSEISelDAGToDAG.h
  test/CodeGen/Mips/inlineasm_constraint_ZC.ll

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