[PATCH] [LLVM] Add support for armv6k subtarget

[Tim Northover]

================
Comment at: test/MC/ARM/arm11-hint-instr.s:48-49
@@ +47,4 @@
+
+ at ------------------------------------------------------------------------------
+@ v6T2 uses ARM encoding
+ at ------------------------------------------------------------------------------
----------------
I think this is a bit misleading. A v6T2 CPU ought to assemble the instructions in both ARM and Thumb mode. It's your triple that forces it to use in ARM mode, not an intrinsic property of the processor.

I'd suggest merging CHECK-V6K and CHECK-V6T2 into CHECK-ARM. V6M is always special (possibly with a capital 'S'), it's fine as is.

http://reviews.llvm.org/D8126

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