[PATCH] [new docs] Performance Tips for Frontend Authors

[Sean Silva]

Other than putting it in a frontend-targeted directory and a couple tiny things I've suggested inline, the LGTM.


================
Comment at: docs/PerformanceTips.rst:29
@@ +28,3 @@
+==================================
+On some modern architectures (X86_64 is one), sign extension can involve an 
+extra instruction whereas zero extension can be folded into a load.  LLVM will 
----------------
I'm not sure that "modern" has anything to do with whether the ISA provides a sign-extending load (and I wouldn't call x86_64 "modern" either). Maybe just "On some architectures (such as X86_64), ...".

================
Comment at: docs/PerformanceTips.rst:40
@@ +39,3 @@
+============================================
+Internally, LLVM often promotes the width of GEP indices to machine register width.  When it does so, it will default to using sign extension (sext) operations for safety.  If your source language provides information about the range of the index, you may wish to manual extend indices to machine register width using a zext instruction.
+
----------------
s/manual/manually/

Also, this paragraph doesn't seem to be folded to 80 columns, unlike the other paragraphs.

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Comment at: docs/PerformanceTips.rst:44-45
@@ +43,4 @@
+Adding to this document
+=======================
+
+If you run across a case that you feel deserves to be covered here, please send
----------------
Tiny nit: I would prefer if you added a blank line after the `=====` (as you are doing here) for the other sections.

http://reviews.llvm.org/D7890

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