[llvm] r230229 - [X86] Add specific mtriple in order to appease builbots

[Eric Christopher]

The difference here is just the number of # in comments. The attached patch
works for it (and means there's no need to make this change as it shouldn't
be triple specific).

Honestly it's probably a bug that darwin emits two of them :)

-eric

On Mon Feb 23 2015 at 7:38:06 AM Bruno Cardoso Lopes <
bruno.cardoso at gmail.com> wrote:

> Author: bruno
> Date: Mon Feb 23 09:33:40 2015
> New Revision: 230229
>
> URL: http://llvm.org/viewvc/llvm-project?rev=230229&view=rev
> Log:
> [X86] Add specific mtriple in order to appease builbots
>
> Modified:
>     llvm/trunk/test/CodeGen/X86/mmx-fold-load.ll
>
> Modified: llvm/trunk/test/CodeGen/X86/mmx-fold-load.ll
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/
> X86/mmx-fold-load.ll?rev=230229&r1=230228&r2=230229&view=diff
> ============================================================
> ==================
> --- llvm/trunk/test/CodeGen/X86/mmx-fold-load.ll (original)
> +++ llvm/trunk/test/CodeGen/X86/mmx-fold-load.ll Mon Feb 23 09:33:40 2015
> @@ -1,4 +1,4 @@
> -; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
> +; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
>
>  define i64 @t0(<1 x i64>* %a, i32* %b) {
>  ; CHECK-LABEL: t0:
>
>
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diff --git a/test/CodeGen/X86/mmx-fold-load.ll b/test/CodeGen/X86/mmx-fold-load.ll
index ef31ffc..90e61e2 100644
--- a/test/CodeGen/X86/mmx-fold-load.ll
+++ b/test/CodeGen/X86/mmx-fold-load.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
+; RUN: llc < %s -march=x86-64 -mattr=+mmx,+sse2 | FileCheck %s
 
 define i64 @t0(<1 x i64>* %a, i32* %b) {
 ; CHECK-LABEL: t0:
-; CHECK:       ## BB#0: ## %entry
+; CHECK:       # BB#0: # %entry
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    psllq (%rsi), %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
@@ -19,7 +19,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.q(x86_mmx, i32)
 
 define i64 @t1(<1 x i64>* %a, i32* %b) {
 ; CHECK-LABEL: t1:
-; CHECK:       ## BB#0: ## %entry
+; CHECK:       # BB#0: # %entry
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    psrlq (%rsi), %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
@@ -36,7 +36,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.q(x86_mmx, i32)
 
 define i64 @t2(<1 x i64>* %a, i32* %b) {
 ; CHECK-LABEL: t2:
-; CHECK:       ## BB#0: ## %entry
+; CHECK:       # BB#0: # %entry
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    psllw (%rsi), %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
@@ -53,7 +53,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.w(x86_mmx, i32)
 
 define i64 @t3(<1 x i64>* %a, i32* %b) {
 ; CHECK-LABEL: t3:
-; CHECK:       ## BB#0: ## %entry
+; CHECK:       # BB#0: # %entry
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    psrlw (%rsi), %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
@@ -70,7 +70,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.w(x86_mmx, i32)
 
 define i64 @t4(<1 x i64>* %a, i32* %b) {
 ; CHECK-LABEL: t4:
-; CHECK:       ## BB#0: ## %entry
+; CHECK:       # BB#0: # %entry
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    pslld (%rsi), %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
@@ -87,7 +87,7 @@ declare x86_mmx @llvm.x86.mmx.pslli.d(x86_mmx, i32)
 
 define i64 @t5(<1 x i64>* %a, i32* %b) {
 ; CHECK-LABEL: t5:
-; CHECK:       ## BB#0: ## %entry
+; CHECK:       # BB#0: # %entry
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    psrld (%rsi), %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
@@ -104,7 +104,7 @@ declare x86_mmx @llvm.x86.mmx.psrli.d(x86_mmx, i32)
 
 define i64 @t6(<1 x i64>* %a, i32* %b) {
 ; CHECK-LABEL: t6:
-; CHECK:       ## BB#0: ## %entry
+; CHECK:       # BB#0: # %entry
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    psraw (%rsi), %mm0
 ; CHECK-NEXT:    movd %mm0, %rax
@@ -121,7 +121,7 @@ declare x86_mmx @llvm.x86.mmx.psrai.w(x86_mmx, i32)
 
 define i64 @t7(<1 x i64>* %a, i32* %b) {
 ; CHECK-LABEL: t7:
-; CHECK:       ## BB#0: ## %entry
+; CHECK:       # BB#0: # %entry
 ; CHECK-NEXT:    movq (%rdi), %mm0
 ; CHECK-NEXT:    psrad (%rsi), %mm0
 ; CHECK-NEXT:    movd %mm0, %rax