[PATCH] Add the P8 VSX logical instructions

[hfinkel at anl.gov]

Fixing the triple issue below, this LGTM.


REPOSITORY
  rL LLVM

================
Comment at: lib/Target/PowerPC/PPCInstrVSX.td:944
@@ +943,3 @@
+// The following VSX instructions were introduced in Power ISA 2.07
+/* FIXME: if the operands are v2i64, these patterns will not match.
+   we should define new patterns or otherwise match the same patterns
----------------
I assume the issue is with vnot_ppc (because the and/or/xor will still be promoted to v4i32).


================
Comment at: test/CodeGen/PowerPC/xxleqv_xxlnand_xxlorc.ll:4
@@ +3,3 @@
+; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
+; RUN: llc -march=ppc64le -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
+; Test x eqv y
----------------
Shouldn't this triple be powerpc64le-...?

http://reviews.llvm.org/D7616

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/