[PATCH] R600/SI: Fix f64 inline immediates

[Matt Arsenault]

> On Feb 13, 2015, at 7:35 AM, Tom Stellard <tom at stellard.net> wrote:
> 
> On Thu, Feb 12, 2015 at 06:15:52PM -0800, Matt Arsenault wrote:
>> 
>>> On Feb 6, 2015, at 10:53 AM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>> wrote:
>>> 
>>>> 
>>>> On Jan 31, 2015, at 3:46 PM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com> <mailto:arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>>> wrote:
>>>> 
>>>> 
>>>>> On Dec 12, 2014, at 2:54 PM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com> <mailto:arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>>> wrote:
>>>>> 
>>>>> 
>>>>>> On Dec 11, 2014, at 9:36 PM, Tom Stellard <tom at stellard.net <mailto:tom at stellard.net> <mailto:tom at stellard.net <mailto:tom at stellard.net>>> wrote:
>>>>>> 
>>>>>> On Thu, Dec 11, 2014 at 06:40:06PM -0500, Matt Arsenault wrote:
>>>>>>> 
>>>>>>>> On Dec 11, 2014, at 6:15 PM, Tom Stellard <tom at stellard.net <mailto:tom at stellard.net> <mailto:tom at stellard.net <mailto:tom at stellard.net>>> wrote:
>>>>>>>> 
>>>>>>>> On Tue, Nov 25, 2014 at 01:04:06PM -0500, Matt Arsenault wrote:
>>>>>>>>> 
>>>>>>>>>> On Nov 21, 2014, at 1:51 PM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com> <mailto:arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>>> wrote:
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>>> On Nov 16, 2014, at 4:34 AM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com> <mailto:arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>>> wrote:
>>>>>>>>>>> 
>>>>>>>>>>> 
>>>>>>>>>>>> On Nov 3, 2014, at 3:59 PM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com> <mailto:arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>>> wrote:
>>>>>>>>>>>> 
>>>>>>>>>>>> 
>>>>>>>>>>>>> On Oct 17, 2014, at 1:52 PM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com> <mailto:arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>>> wrote:
>>>>>>>>>>>>> 
>>>>>>>>>>>>> 
>>>>>>>>>>>>> On Oct 10, 2014, at 2:08 PM, Matt Arsenault <arsenm2 at gmail.com <mailto:arsenm2 at gmail.com> <mailto:arsenm2 at gmail.com <mailto:arsenm2 at gmail.com>>> wrote:
>>>>>>>>>>>>> 
>>>>>>>>>>>>>> Hi,
>>>>>>>>>>>>>> 
>>>>>>>>>>>>>> These allows using double inline immediates which before were split into 2 moves to materialize these
>>>>>>>>>>>>>> 
>>>>>>>>>>>>>> 
>>>>>>>>>>>>>> <0001-R600-SI-Don-t-verify-constant-bus-usage-of-flag-ops.patch><0002-R600-SI-Fix-f64-inline-immediates.patch><0003-R600-SI-Allow-f64-inline-immediates-in-i64-operands.patch>
>>>>>>>>>>>>> 
>>>>>>>>>>>>> 
>>>>>>>>>>>>> ping
>>>>>>>>>>>> 
>>>>>>>>>>>> ping
>>>>>>>>>>> 
>>>>>>>>>>> Updated patches
>>>>>>>>>>> 
>>>>>>>>>>> 
>>>>>>>>>>> <0001-R600-SI-Don-t-verify-constant-bus-usage-of-flag-ops.patch><0002-R600-SI-Fix-f64-inline-immediates.patch><0003-R600-SI-Allow-f64-inline-immediates-in-i64-operands.patch>
>>>>>>>>>> 
>>>>>>>>>> 
>>>>>>>>>> ping
>>>>>>>>> 
>>>>>>>>> 
>>>>>>>>> Updated patches after SIFoldOperands
>>>>>>>>> 
>>>>>>>> 
>>>>>>>> 
>>>>>>>> The first 2 patches LGTM.  Could you rebase the other two so I can test
>>>>>>>> them.
>>>>>>>> 
>>>>>>>> -Tom
>>>>>>>> 
>>>>>>>> 
>>>>>>>>> _______________________________________________
>>>>>>>>> llvm-commits mailing list
>>>>>>>>> llvm-commits at cs.uiuc.edu <mailto:llvm-commits at cs.uiuc.edu> <mailto:llvm-commits at cs.uiuc.edu <mailto:llvm-commits at cs.uiuc.edu>> <mailto:llvm-commits at cs.uiuc.edu <mailto:llvm-commits at cs.uiuc.edu> <mailto:llvm-commits at cs.uiuc.edu <mailto:llvm-commits at cs.uiuc.edu>>>
>>>>>>>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits <http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits> <http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits <http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits>> <http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits <http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits><http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits <http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits>>>
>>>>>>> 
>>>>>>> r224078-r224079 for the first two.
>>>>>>> 
>>>>>>> Rebased second two:
>>>>>> 
>>>>>> Patch 1: LGTM
>>>>>> 
>>>>>> Patch 2 breaks the encoding of immediates:
>>>>>> 
>>>>>>       v_mov_b32_e32 v3, 0x41100000    ; 7E0602FF 00000000
>>>>>>       v_mov_b32_e32 v2, 0x40c00000    ; 7E0402FF 00000000
>>>>>>       v_mov_b32_e32 v1, 0x40400000    ; 7E0202FF 00000000
>>>>>> 
>>>>>> 
>>>>>> -Tom
>>>>> 
>>>>> 
>>>>> I’m not seeing this?:
>>>>> 
>>>>> define void @store_literal(i32 addrspace(1)* %out) {
>>>>>  store i32 u0x41100000, i32 addrspace(1)* %out
>>>>>  ret void
>>>>> }
>>>>> 
>>>>> -show-mc-encoding says
>>>>> v_mov_b32_e32 v0, 0x41100000    ; encoding: [0xff,0x02,0x00,0x7e,0x00,0x00,0x10,0x41]
>>>>> 
>>>> 
>>>> 
>>>> Updated patches
>>>> 
>>>> <0001-R600-SI-Remove-unnecessary-check-for-fpimm.patch>
>>>> <0002-R600-SI-Allow-f64-inline-immediates-in-i64-operands.patch>
>>>> <0003-R600-SI-Remove-handling-of-fpimm.patch>
>>>> 
>>>> 
>>> 
>>> 
>> 
>> Updated patches that stop the encoder from assuming that inline integer immediate were sign extended to 64-bit. When immediates are split and generally handled other places, the upper bits of the constants are ignored.
>> 
> 
> 
> LGTM for all 3 patches.
> 
> -Tom


r229034, r229134, r229135 plus some test changes

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