[PATCH] [PowerPC] Implement miscellaneous vector logical operations introduced in POWER8

hfinkel at anl.gov hfinkel at anl.gov
Fri Feb 6 09:29:27 PST 2015

In http://reviews.llvm.org/D7469#119843, @kbarton wrote:

> How is the following:
> // FIXME: Use AddedComplexity > 400 to ensure these patterns match before the
>  //        VSX equivalents. We need to fix this up at some point. Two possible
>  //        solutions for this problem:
>  //        1. Disable Altivec patterns that compete with VSX patterns using the
>  //           !HasVSX predicate. This essentially favours VSX over Altivec, in
>  //           hopes of reducing register pressure (larger register set using VSX
>  //           instructions then VMX instructions)
>  //        2. Employ a more disciplined use of AddedComplexity, which would provide
>  //           more fine-grained control then option 1. This would be beneficial

then -> than

> //           if we find situations where Altivec is really preferred over VSX.

LGTM, thanks!



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