[llvm] r228283 - [X86] Add xrstors/xsavec/xsaves/clflushopt/clwb/pcommit instructions

[Bruno Cardoso Lopes]

Hi Craig,

Do you plan to add tests for those?

On Thu, Feb 5, 2015 at 6:51 AM, Craig Topper <craig.topper at gmail.com> wrote:
> Author: ctopper
> Date: Thu Feb  5 02:51:06 2015
> New Revision: 228283
>
> URL: http://llvm.org/viewvc/llvm-project?rev=228283&view=rev
> Log:
> [X86] Add xrstors/xsavec/xsaves/clflushopt/clwb/pcommit instructions
>
> Modified:
>     llvm/trunk/lib/Target/X86/X86InstrInfo.td
>     llvm/trunk/lib/Target/X86/X86InstrSSE.td
>     llvm/trunk/lib/Target/X86/X86InstrSystem.td
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=228283&r1=228282&r2=228283&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Thu Feb  5 02:51:06 2015
> @@ -2410,6 +2410,16 @@ let Predicates = [HasTBM] in {
>  } // HasTBM
>
>  //===----------------------------------------------------------------------===//
> +// Memory Instructions
> +//
> +
> +def CLFLUSHOPT : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
> +                   "clflushopt\t$src", []>, PD;
> +def CLWB       : I<0xAE, MRM6m, (outs), (ins i8mem:$src), "clwb\t$src", []>, PD;
> +def PCOMMIT    : I<0xAE, MRM_F8, (outs), (ins), "pcommit", []>, PD;
> +
> +
> +//===----------------------------------------------------------------------===//
>  // Subsystems.
>  //===----------------------------------------------------------------------===//
>
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=228283&r1=228282&r2=228283&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Thu Feb  5 02:51:06 2015
> @@ -3975,7 +3975,7 @@ let SchedRW = [WriteLoad] in {
>  // Flush cache
>  def CLFLUSH : I<0xAE, MRM7m, (outs), (ins i8mem:$src),
>                 "clflush\t$src", [(int_x86_sse2_clflush addr:$src)],
> -               IIC_SSE_PREFETCH>, TB, Requires<[HasSSE2]>;
> +               IIC_SSE_PREFETCH>, PS, Requires<[HasSSE2]>;
>  }
>
>  let SchedRW = [WriteNop] in {
> @@ -3990,7 +3990,7 @@ let SchedRW = [WriteFence] in {
>  // Load, store, and memory fence
>  def SFENCE : I<0xAE, MRM_F8, (outs), (ins),
>                 "sfence", [(int_x86_sse_sfence)], IIC_SSE_SFENCE>,
> -               TB, Requires<[HasSSE1]>;
> +               PS, Requires<[HasSSE1]>;
>  def LFENCE : I<0xAE, MRM_E8, (outs), (ins),
>                 "lfence", [(int_x86_sse2_lfence)], IIC_SSE_LFENCE>,
>                 TB, Requires<[HasSSE2]>;
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrSystem.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSystem.td?rev=228283&r1=228282&r2=228283&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrSystem.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrSystem.td Thu Feb  5 02:51:06 2015
> @@ -492,9 +492,22 @@ let Uses = [RDX, RAX] in {
>    def XRSTOR64 : RI<0xAE, MRM5m, (outs), (ins opaque512mem:$dst),
>                   "xrstor64\t$dst", []>, TB, Requires<[In64BitMode]>;
>    def XSAVEOPT : I<0xAE, MRM6m, (outs opaque512mem:$dst), (ins),
> -                  "xsaveopt\t$dst", []>, TB;
> +                  "xsaveopt\t$dst", []>, PS;
>    def XSAVEOPT64 : RI<0xAE, MRM6m, (outs opaque512mem:$dst), (ins),
> -                    "xsaveopt64\t$dst", []>, TB, Requires<[In64BitMode]>;
> +                    "xsaveopt64\t$dst", []>, PS, Requires<[In64BitMode]>;
> +
> +  def XRSTORS : I<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
> +                "xrstors\t$dst", []>, TB;
> +  def XRSTORS64 : RI<0xC7, MRM3m, (outs), (ins opaque512mem:$dst),
> +                  "xrstors64\t$dst", []>, TB, Requires<[In64BitMode]>;
> +  def XSAVEC : I<0xC7, MRM4m, (outs opaque512mem:$dst), (ins),
> +                "xsavec\t$dst", []>, TB;
> +  def XSAVEC64 : RI<0xC7, MRM4m, (outs opaque512mem:$dst), (ins),
> +                  "xsavec64\t$dst", []>, TB, Requires<[In64BitMode]>;
> +  def XSAVES : I<0xC7, MRM5m, (outs opaque512mem:$dst), (ins),
> +                "xsaves\t$dst", []>, TB;
> +  def XSAVES64 : RI<0xC7, MRM5m, (outs opaque512mem:$dst), (ins),
> +                  "xsaves64\t$dst", []>, TB, Requires<[In64BitMode]>;
>  }
>  } // SchedRW
>
>
>
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-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc