[llvm] r227642 - [AArch64] Add a few more DUP testcases. NFC.

[Ahmed Bougacha]

Author: ab
Date: Fri Jan 30 17:41:15 2015
New Revision: 227642

URL: http://llvm.org/viewvc/llvm-project?rev=227642&view=rev
Log:
[AArch64] Add a few more DUP testcases.  NFC.

Also, don't lie about testing index 0.

Modified:
    llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll

Modified: llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll?rev=227642&r1=227641&r2=227642&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/neon-scalar-copy.ll Fri Jan 30 17:41:15 2015
@@ -19,6 +19,14 @@ define float @test_dup_sv2S_0(<2 x float
 
 define float @test_dup_sv4S(<4 x float> %v) #0 {
  ; CHECK-LABEL: test_dup_sv4S:
+ ; CHECK-NEXT: ins {{v[0-9]+}}.s[0], {{v[0-9]+}}.s[1]
+ ; CHECK-NEXT: ret
+ %tmp1 = extractelement <4 x float> %v, i32 1
+ ret float  %tmp1
+}
+
+define float @test_dup_sv4S_0(<4 x float> %v) #0 {
+ ; CHECK-LABEL: test_dup_sv4S_0:
  ; CHECK-NOT: dup {{[vsd][0-9]+}}
  ; CHECK-NOT: ins {{[vsd][0-9]+}}
  ; CHECK-NEXT: ret
@@ -45,12 +53,30 @@ define double @test_dup_dv2D(<2 x double
 
 define double @test_dup_dv2D_0(<2 x double> %v) #0 {
  ; CHECK-LABEL: test_dup_dv2D_0:
- ; CHECK-NEXT: ins {{v[0-9]+}}.d[0], {{v[0-9]+}}.d[1]
+ ; CHECK-NOT: dup {{[vsd][0-9]+}}
+ ; CHECK-NOT: ins {{[vsd][0-9]+}}
  ; CHECK-NEXT: ret
- %tmp1 = extractelement <2 x double> %v, i32 1
+ %tmp1 = extractelement <2 x double> %v, i32 0
  ret double  %tmp1
 }
 
+define half @test_dup_hv8H(<8 x half> %v) #0 {
+ ; CHECK-LABEL: test_dup_hv8H:
+ ; CHECK-NEXT: ins {{v[0-9]+}}.h[0], {{v[0-9]+}}.h[1]
+ ; CHECK-NEXT: ret
+ %tmp1 = extractelement <8 x half> %v, i32 1
+ ret half  %tmp1
+}
+
+define half @test_dup_hv8H_0(<8 x half> %v) #0 {
+ ; CHECK-LABEL: test_dup_hv8H_0:
+ ; CHECK-NOT: dup {{[vsdh][0-9]+}}
+ ; CHECK-NOT: ins {{[vsdh][0-9]+}}
+ ; CHECK-NEXT: ret
+ %tmp1 = extractelement <8 x half> %v, i32 0
+ ret half  %tmp1
+}
+
 define <1 x i8> @test_vector_dup_bv16B(<16 x i8> %v1) #0 {
  ; CHECK-LABEL: test_vector_dup_bv16B:
  ; CHECK-NEXT: umov [[W:w[0-9]+]], v0.b[14]