[PATCH] Change more of the guts of CodeGenRegister's RegUnit tracking to be based on bit vectors.

[Owen Anderson]

Hi Chandler,

In release mode, generating the X86 register info is maybe 20ms faster.  In debug mode, there difference is not measurable on either X86 or my worst-case target.

—Owen

> On Jan 30, 2015, at 11:21 AM, Chandler Carruth <chandlerc at gmail.com> wrote:
> 
> Will look at the code shortly, but can you benchmark a more typical target's tablegen runs as well just to make sure we're not making a bad tradeoff here? Similarly, how does it do in debug+asserts builds which are frustratingly common?
> 
> On Jan 30, 2015 11:03 AM, "Owen Anderson" <resistor at mac.com <mailto:resistor at mac.com>> wrote:
> Hi chandlerc,
> 
> This is a continuation of my prior work to move some of the inner workings for CodeGenRegister to use bit vectors when computing about register units.  This is highly beneficial to TableGen runtime on targets with large, dense register files.  This patch represents a ~40% runtime reduction over and above my earlier improvement on a stress test of this case.
> 
> REPOSITORY
>   rL LLVM
> 
> http://reviews.llvm.org/D7301 <http://reviews.llvm.org/D7301>
> 
> Files:
>   utils/TableGen/CodeGenRegisters.cpp
>   utils/TableGen/CodeGenRegisters.h
>   utils/TableGen/RegisterInfoEmitter.cpp
> 
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