[llvm] r227462 - R600/SI: Remove stray debug statements

[Tom Stellard]

Hi Hans,

Is it OK to merge this patch to the 3.6 branch?

I am the code owner and I approve this patch.

Thanks,
Tom

On Thu, Jan 29, 2015 at 04:55:28PM -0000, Tom Stellard wrote:
> Author: tstellar
> Date: Thu Jan 29 10:55:28 2015
> New Revision: 227462
> 
> URL: http://llvm.org/viewvc/llvm-project?rev=227462&view=rev
> Log:
> R600/SI: Remove stray debug statements
> 
> Modified:
>     llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp
> 
> Modified: llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp?rev=227462&r1=227461&r2=227462&view=diff
> ==============================================================================
> --- llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp (original)
> +++ llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp Thu Jan 29 10:55:28 2015
> @@ -23,7 +23,6 @@
>  #include "llvm/IR/Function.h"
>  #include "llvm/IR/LLVMContext.h"
>  
> -#include "llvm/Support/Debug.h"
>  using namespace llvm;
>  
>  SIRegisterInfo::SIRegisterInfo(const AMDGPUSubtarget &st)
> @@ -140,7 +139,6 @@ void SIRegisterInfo::buildScratchLoadSto
>    unsigned Size = NumSubRegs * 4;
>  
>    if (!isUInt<12>(Offset + Size)) {
> -    dbgs() << "Offset scavenge\n";
>      SOffset = RS->scavengeRegister(&AMDGPU::SGPR_32RegClass, MI, 0);
>      if (SOffset == AMDGPU::NoRegister) {
>        RanOutOfSGPRs = true;
> @@ -235,10 +233,8 @@ void SIRegisterInfo::eliminateFrameIndex
>             Ctx.emitError("Ran out of VGPRs for spilling SGPR");
>          }
>  
> -        if (isM0) {
> -          dbgs() << "Scavenge M0\n";
> +        if (isM0)
>            SubReg = RS->scavengeRegister(&AMDGPU::SGPR_32RegClass, MI, 0);
> -        }
>  
>          BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_READLANE_B32), SubReg)
>                  .addReg(Spill.VGPR)
> 
> 
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