[PATCH] [Mips][Disassembler][R6] Disassembler crashes on cache/pref instructions for r6

Daniel Sanders daniel.sanders at imgtec.com
Wed Jan 28 08:05:49 PST 2015


LGTM with a few nits


================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:256-258
@@ +255,5 @@
+static DecodeStatus DecodeCacheOpR6(MCInst &Inst,
+  unsigned Insn,
+  uint64_t Address,
+  const void *Decoder);
+
----------------
Nit: Indentation

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:1120-1122
@@ +1119,5 @@
+static DecodeStatus DecodeCacheOpR6(MCInst &Inst,
+  unsigned Insn,
+  uint64_t Address,
+  const void *Decoder) {
+  int Offset = SignExtend32<9>((Insn & 0xff80) >> 7);
----------------
Nit: Indentation

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:1123
@@ +1122,3 @@
+  const void *Decoder) {
+  int Offset = SignExtend32<9>((Insn & 0xff80) >> 7);
+  unsigned Hint = fieldFromInstruction(Insn, 16, 5);
----------------
Nit: Just for consistency, we should probably use 'fieldFromInstruction(Insn, 7, 9)' instead of '(Insn & 0xff90) >> 7'

================
Comment at: lib/Target/Mips/Disassembler/MipsDisassembler.cpp:1127
@@ +1126,3 @@
+
+  Base = getReg(Decoder, Mips::GPR32RegClassID, Base);
+
----------------
The same opcode is used for MIPS64r6 too. We should pick GPR32/GPR64 according to the subtarget

================
Comment at: test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt:144
@@ +143,2 @@
+0x35 0x04 0xa1 0x7c    # CHECK: pref 1, 8($5
+
----------------
Nit: Blank line at EOF

================
Comment at: test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt:144
@@ +143,2 @@
+0x7c 0xa1 0x04 0x35    # CHECK: pref 1, 8($5)
+
----------------
Nit: Blank line at EOF

================
Comment at: test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt:162
@@ +161,2 @@
+0x35 0x04 0xa1 0x7c    # CHECK: pref 1, 8($5
+
----------------
Nit: Blank line at EOF

================
Comment at: test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt:162
@@ +161,2 @@
+0x7c 0xa1 0x04 0x35    # CHECK: pref 1, 8($5)
+
----------------
Nit: Blank line at EOF

http://reviews.llvm.org/D6810

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