[PATCH] [AArch64] Fix problems in handling generic MSR/MRS instructions

[Petr Pavlu]

This change fixes the following problems:
1) Decoding to MSRpstate should occur only if <op1><op2> represents a valid <pstatefield>, else the instruction should be decoded to a generic MSR.
2) AsmParser should not produce a MSR/MRS MCInst that can encode to a same bitpattern as another system instruction.

Unfortunately, it seems it is currently not possible to fix these problems cleanly at the TableGen level. The patch works around it by ugly rewriting MCInsts in Disassembler and AsmParser.

http://reviews.llvm.org/D7174

Files:
  lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
  test/MC/AArch64/arm64-system-encoding.s
  test/MC/AArch64/basic-a64-instructions.s
  test/MC/Disassembler/AArch64/basic-a64-instructions.txt

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