[lld] r227059 - [Mips] Add checking of disassembler output in some test cases
Simon Atanasyan
simon at atanasyan.com
Sun Jan 25 13:31:53 PST 2015
Author: atanasyan
Date: Sun Jan 25 15:31:52 2015
New Revision: 227059
URL: http://llvm.org/viewvc/llvm-project?rev=227059&view=rev
Log:
[Mips] Add checking of disassembler output in some test cases
No functional changes.
Modified:
lld/trunk/test/elf/Mips/plt-header-micro.test
lld/trunk/test/elf/Mips/plt-header-mixed.test
lld/trunk/test/elf/Mips/r26-1-micro.test
lld/trunk/test/elf/Mips/r26-2-micro.test
lld/trunk/test/elf/Mips/rel-dynamic-01-micro.test
lld/trunk/test/elf/Mips/rel-dynamic-03-micro.test
Modified: lld/trunk/test/elf/Mips/plt-header-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/plt-header-micro.test?rev=227059&r1=227058&r2=227059&view=diff
==============================================================================
--- lld/trunk/test/elf/Mips/plt-header-micro.test (original)
+++ lld/trunk/test/elf/Mips/plt-header-micro.test Sun Jan 25 15:31:52 2015
@@ -10,33 +10,31 @@
# Build executable
# RUN: yaml2obj -format=elf -docnum 2 %s > %t-o.o
# RUN: lld -flavor gnu -target mipsel -e glob -o %t.exe %t-o.o %t.so
-# RUN: llvm-objdump -section-headers -s %t.exe | \
-# RUN: FileCheck -check-prefix=EXE %s
+# RUN: llvm-objdump -d -mattr=micromips %t.exe | FileCheck -check-prefix=DIS %s
+# RUN: llvm-objdump -section-headers %t.exe | FileCheck -check-prefix=EXE %s
-# FIXME (simon): Check the disassembler output when llvm-objdump starts
-# to support microMIPS instruction encoding.
-# DIS: Disassembly of section .plt:
-# DIS: .plt:
-# DIS-NEXT: 400170: 7980 07a4 addiu v1,$pc,7824
-# DIS-NEXT: 400174: ff23 0000 lw t9,0(v1)
-# DIS-NEXT: 400178: 0535 subu v0,v0,v1
-# DIS-NEXT: 40017a: 2525 srl v0,v0,2
-# DIS-NEXT: 40017c: 3302 fffe addiu t8,v0,-2
-# DIS-NEXT: 400180: 0dff move t7,ra
-# DIS-NEXT: 400182: 45f9 jalrs t9
-# DIS-NEXT: 400184: 0f83 move gp,v1
-# DIS-NEXT: 400186: 0c00 nop
+# DIS: Disassembly of section .plt:
+# DIS-NEXT: .plt:
+# DIS-NEXT: 400170: 80 79 a4 07 addiupc $3, 7824
+# DIS-NEXT: 400174: 23 ff 00 00 lw $25, 0($3)
+# DIS-NEXT: 400178: 35 05 subu16 $2, $2, $3
+# DIS-NEXT: 40017a: 25 25 srl16 $2, $2, 2
+# DIS-NEXT: 40017c: 02 33 fe ff addiu $24, $2, -2
+# DIS-NEXT: 400180: ff 0d move $15, $ra
+# DIS-NEXT: 400182: f9 45 jalrs16 $25
+# DIS-NEXT: 400184: 83 0f move $gp, $3
+# DIS-NEXT: 400186: 00 0c nop
+
+# DIS-NEXT: 400188: 00 79 a0 07 addiupc $2, 7808
+# DIS-NEXT: 40018c: 22 ff 00 00 lw $25, 0($2)
+# DIS-NEXT: 400190: 99 45 jr16 $25
+# DIS-NEXT: 400192: 02 0f move $24, $2
# EXE: Sections:
# EXE: Idx Name Size Address Type
# EXE: 6 .plt 00000024 0000000000400170 TEXT DATA
# EXE: 10 .got.plt 0000000c 0000000000402000 DATA
-# EXE: Contents of section .plt:
-# EXE-NEXT: 400170 8079a407 23ff0000 35052525 0233feff .y..#...5.%%.3..
-# EXE-NEXT: 400180 ff0df945 830f000c 0079a007 22ff0000 ...E.....y.."...
-# EXE-NEXT: 400190 9945020f
-
# so.o
---
FileHeader:
Modified: lld/trunk/test/elf/Mips/plt-header-mixed.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/plt-header-mixed.test?rev=227059&r1=227058&r2=227059&view=diff
==============================================================================
--- lld/trunk/test/elf/Mips/plt-header-mixed.test (original)
+++ lld/trunk/test/elf/Mips/plt-header-mixed.test Sun Jan 25 15:31:52 2015
@@ -11,46 +11,33 @@
# Build executable
# RUN: yaml2obj -format=elf -docnum 2 %s > %t-o.o
# RUN: lld -flavor gnu -target mipsel -e globR -o %t.exe %t-o.o %t.so
-# RUN: llvm-objdump -section-headers -s %t.exe | \
-# RUN: FileCheck -check-prefix=EXE %s
+# RUN: llvm-objdump -d %t.exe | FileCheck -check-prefix=DIS %s
+# RUN: llvm-objdump -section-headers %t.exe | FileCheck -check-prefix=EXE %s
-# FIXME (simon): Check the disassembler output when llvm-objdump starts
-# to support microMIPS instruction encoding.
-# DIS: Disassembly of section .plt:
-# DIS: .plt:
-# PLT0
-# DIS-NEXT: 400170: 3c1c0040 lui gp,0x40
-# DIS-NEXT: 400174: 8f992000 lw t9,8192(gp)
-# DIS-NEXT: 400178: 279c2000 addiu gp,gp,8192
-# DIS-NEXT: 40017c: 031cc023 subu t8,t8,gp
-# DIS-NEXT: 400180: 03e07821 move t7,ra
-# DIS-NEXT: 400184: 0018c082 srl t8,t8,0x2
-# DIS-NEXT: 400188: 0320f809 jalr t9
-# DIS-NEXT: 40018c: 2718fffe addiu t8,t8,-2
+# DIS: Disassembly of section .plt:
+# DIS-NEXT: .plt:
+# DIS-NEXT: 400170: 40 00 1c 3c lui $gp, 64
+# DIS-NEXT: 400174: 00 20 99 8f lw $25, 8192($gp)
+# DIS-NEXT: 400178: 00 20 9c 27 addiu $gp, $gp, 8192
+# DIS-NEXT: 40017c: 23 c0 1c 03 subu $24, $24, $gp
+# DIS-NEXT: 400180: 21 78 e0 03 move $15, $ra
+# DIS-NEXT: 400184: 82 c0 18 00 srl $24, $24, 2
+# DIS-NEXT: 400188: 09 f8 20 03 jalr $25
+# DIS-NEXT: 40018c: fe ff 18 27 addiu $24, $24, -2
+
+# DIS-NEXT: 400190: 40 00 0f 3c lui $15, 64
+# DIS-NEXT: 400194: 08 20 f9 8d lw $25, 8200($15)
+# DIS-NEXT: 400198: 08 00 20 03 jr $25
+# DIS-NEXT: 40019c: 08 20 f8 25 addiu $24, $15, 8200
-# T1 at plt
-# DIS-NEXT: 400190: 3c0f0040 lui t7,0x40
-# DIS-NEXT: 400194: 8df92008 lw t9,8200(t7)
-# DIS-NEXT: 400198: 03200008 jr t9
-# DIS-NEXT: 40019c: 25f82008 addiu t8,t7,8200
-
-# T1 at micromipsplt
-# DIS-NEXT: 4001a0: 7900 079a addiu v0,$pc,7784
-# DIS-NEXT: 4001a4: ff22 0000 lw t9,0(v0)
-# DIS-NEXT: 4001a8: 4599 jr t9
-# DIS-NEXT: 4001aa: 0f02 move t8,v0
+# FIXME (simon): Check micromips PLT entry
+# DIS-NEXT: 4001a8: 99 45 02 0f jal 201922148
# EXE: Sections:
# EXE: Idx Name Size Address Type
# EXE: 6 .plt 0000003c 0000000000400170 TEXT DATA
# EXE: 10 .got.plt 0000000c 0000000000402000 DATA
-# EXE: Contents of section .plt:
-# EXE-NEXT: 400170 40001c3c 0020998f 00209c27 23c01c03 @..<. ... .'#...
-# EXE-NEXT: 400180 2178e003 82c01800 09f82003 feff1827 !x........ ....'
-# EXE-NEXT: 400190 40000f3c 0820f98d 08002003 0820f825 @..<. .... .. .%
-# EXE-NEXT: 4001a0 00799a07 22ff0000 9945020f .y.."....E..
-
# so.o
---
FileHeader:
Modified: lld/trunk/test/elf/Mips/r26-1-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/r26-1-micro.test?rev=227059&r1=227058&r2=227059&view=diff
==============================================================================
--- lld/trunk/test/elf/Mips/r26-1-micro.test (original)
+++ lld/trunk/test/elf/Mips/r26-1-micro.test Sun Jan 25 15:31:52 2015
@@ -11,9 +11,10 @@
# RUN: llvm-readobj -relocations %t-o.o | \
# RUN: FileCheck -check-prefix=OBJ-REL %s
# RUN: lld -flavor gnu -target mipsel -e glob -o %t.exe %t-o.o %t.so
-# RUN: llvm-objdump -section-headers -s %t.exe | \
-# RUN: FileCheck -check-prefix=EXE %s
# RUN: llvm-readobj -relocations %t.exe | FileCheck -check-prefix=EXE-REL %s
+# RUN: llvm-objdump -section-headers %t.exe | FileCheck -check-prefix=EXE %s
+# RUN: llvm-objdump -s -d -mattr=micromips %t.exe | \
+# RUN: FileCheck -check-prefix=DIS %s
# Object file has three R_MICROMIPS_26_S1 relocations
# OBJ-REL: Relocations [
@@ -31,38 +32,31 @@
# EXE-REL-NEXT: }
# EXE-REL-NEXT: ]
-# FIXME (simon): Check the disassembler output when llvm-objdump starts
-# to support microMIPS instruction encoding.
-# DIS: Disassembly of section .plt:
-# DIS: .plt:
-# T1 at micromipsplt
-# DIS-NEXT: 400178: 7900 07a4 addiu v0,$pc,7824
-# DIS-NEXT: 40017c: ff22 0000 lw t9,0(v0)
-# DIS-NEXT: 400180: 4599 jr t9
-# DIS-NEXT: 400182: 0f02 move t8,v0
-
-# DIS: Disassembly of section .text:
-# DIS: glob:
-# DIS-NEXT: 400184: f809 0320 sw zero,800(t1)
-# DIS-NEXT: 400188: 0000 0000 nop
-# DIS-NEXT: 40018c: 0012 0661 0x120661
-# DIS-NEXT: 400182: 0f02 move t8,v0
-#
-# DIS: loc:
-# DIS-NEXT: 400194: 0020 0cc2 cop2 0x40198
-# DIS-NEXT: 400198: 0000 0000 nop
-# DIS-NEXT: 40019c: 0020 0cbc mult $ac0,zero,at
-# DIS-NEXT: 4001a0: 0000 0000 nop
-
# EXE: Sections:
# EXE: Idx Name Size Address Type
# EXE: 6 .plt 00000024 0000000000400160 TEXT DATA
# EXE: 10 .got.plt 0000000c 0000000000402000 DATA
-# EXE: Contents of section .plt:
-# EXE-NEXT: 400160 8079a807 23ff0000 35052525 0233feff .y..#...5.%%.3..
-# EXE-NEXT: 400170 ff0df945 830f000c 0079a407 22ff0000 ...E.....y.."...
-# EXE-NEXT: 400180 9945020f .E..
+# DIS: Disassembly of section .plt:
+# DIS-NEXT: .plt:
+# DIS-NEXT: 400160: 80 79 a8 07 addiupc $3, 7840
+# DIS-NEXT: 400164: 23 ff 00 00 lw $25, 0($3)
+# DIS-NEXT: 400168: 35 05 subu16 $2, $2, $3
+# DIS-NEXT: 40016a: 25 25 srl16 $2, $2, 2
+# DIS-NEXT: 40016c: 02 33 fe ff addiu $24, $2, -2
+# DIS-NEXT: 400170: ff 0d move $15, $ra
+# DIS-NEXT: 400172: f9 45 jalrs16 $25
+# DIS-NEXT: 400174: 83 0f move $gp, $3
+# DIS-NEXT: 400176: 00 0c nop
+
+# DIS-NEXT: 400178: 00 79 a4 07 addiupc $2, 7824
+# DIS-NEXT: 40017c: 22 ff 00 00 lw $25, 0($2)
+# DIS-NEXT: 400180: 99 45 jr16 $25
+# DIS-NEXT: 400182: 02 0f move $24, $2
+
+# DIS: Contents of section .text:
+# DIS-NEXT: 400184 09f82003 00000000 12006106 00000000 .. .......a.....
+# DIS-NEXT: 400194 2000c20c 00000000 2000bc0c 00000000 ....... .......
# so.o
---
Modified: lld/trunk/test/elf/Mips/r26-2-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/r26-2-micro.test?rev=227059&r1=227058&r2=227059&view=diff
==============================================================================
--- lld/trunk/test/elf/Mips/r26-2-micro.test (original)
+++ lld/trunk/test/elf/Mips/r26-2-micro.test Sun Jan 25 15:31:52 2015
@@ -3,32 +3,24 @@
# Check reading addendum for R_MICROMIPS_26_S1 relocation.
# RUN: yaml2obj -format=elf %s > %t-obj
# RUN: lld -flavor gnu -target mipsel -o %t-exe %t-obj
-# RUN: llvm-objdump -t -s %t-exe | FileCheck %s
+# RUN: llvm-objdump -d -mattr=micromips %t-exe | FileCheck -check-prefix=DIS %s
+# RUN: llvm-objdump -t %t-exe | FileCheck %s
-# FIXME (simon): Check the disassembler output when llvm-objdump starts
-# to support microMIPS instruction encoding.
# DIS: Disassembly of section .text:
-# DIS-NEXT: __start:
+# DIS-NEXT: loc0:
# DIS-NEXT: 400110: 00 00 00 00 nop
-# DIS-NEXT: 400114: 44 70 10 0c jal 4309264
-# 0x107044 << 2 = 0x41C110 = _start + (0x7000 << 2)
-# DIS-NEXT: 400118: 00 00 00 00 nop
-#
-# DIS: loc:
-# DIS-NEXT: 40011c: 47 70 10 0c jal 4309276
-# 0x107047 << 2 = 0x41C11C = loc + (0x7000 << 2)
-# DIS-NEXT: 400120: 00 00 00 00 nop
-# DIS-NEXT: 400124: 43 00 10 0c jal 4194572
-# 0x100043 << 2 = 0x40010C = _start - 4
-# DIS-NEXT: 400128: 00 00 00 00 nop
-# DIS-NEXT: 40012c: 46 00 10 0c jal 4194584
-# 0x100046 << 2 = 0x400118 = loc - 4
-# DIS-NEXT: 400130: 00 00 00 00 nop
-# CHECK: Contents of section .text:
-# CHECK-NEXT: 400110 00000000 20f48ee0 00000000 20f49ae0 .... ....... ...
-# CHECK-NEXT: 400120 00000000 20f48900 00000000 20f49100 .... ....... ...
-# CHECK-NEXT: 400130 00000000 ....
+# DIS: __start:
+# DIS-NEXT: 400114: 20 f4 8e e0 jal 4309276
+# DIS-NEXT: 400118: 00 00 00 00 nop
+# DIS-NEXT: 40011c: 20 f4 9a e0 jal 4309300
+# DIS-NEXT: 400120: 00 00 00 00 nop
+
+# DIS: loc1:
+# DIS-NEXT: 400124: 20 f4 89 00 jal 4194578
+# DIS-NEXT: 400128: 00 00 00 00 nop
+# DIS-NEXT: 40012c: 20 f4 91 00 jal 4194594
+# DIS-NEXT: 400130: 00 00 00 00 nop
# CHECK: SYMBOL TABLE:
# CHECK: 00400124 l F .text 00000010 loc1
Modified: lld/trunk/test/elf/Mips/rel-dynamic-01-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-dynamic-01-micro.test?rev=227059&r1=227058&r2=227059&view=diff
==============================================================================
--- lld/trunk/test/elf/Mips/rel-dynamic-01-micro.test (original)
+++ lld/trunk/test/elf/Mips/rel-dynamic-01-micro.test Sun Jan 25 15:31:52 2015
@@ -13,16 +13,30 @@
# RUN: lld -flavor gnu -target mipsel -shared -o %t.so %t-so.o
# RUN: yaml2obj -format=elf -docnum 2 %s > %t-o.o
# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t-o.o %t.so
-# RUN: llvm-objdump -s %t.exe | FileCheck -check-prefix=DIS %s
+# RUN: llvm-objdump -d -mattr=micromips %t.exe | FileCheck -check-prefix=DIS %s
# RUN: llvm-readobj -dt -r %t.exe | FileCheck -check-prefix=PLT-SYM %s
-# FIXME (simon): Check the disassembler output when llvm-objdump starts
-# to support microMIPS instruction encoding.
+# DIS: Disassembly of section .plt:
+# DIS-NEXT: .plt:
+# DIS-NEXT: 4001b0: 80 79 94 07 addiupc $3, 7760
+# DIS-NEXT: 4001b4: 23 ff 00 00 lw $25, 0($3)
+# DIS-NEXT: 4001b8: 35 05 subu16 $2, $2, $3
+# DIS-NEXT: 4001ba: 25 25 srl16 $2, $2, 2
+# DIS-NEXT: 4001bc: 02 33 fe ff addiu $24, $2, -2
+# DIS-NEXT: 4001c0: ff 0d move $15, $ra
+# DIS-NEXT: 4001c2: f9 45 jalrs16 $25
+# DIS-NEXT: 4001c4: 83 0f move $gp, $3
+# DIS-NEXT: 4001c6: 00 0c nop
-# DIS: Contents of section .plt:
-# DIS-NEXT: 4001b0 80799407 23ff0000 35052525 0233feff .y..#...5.%%.3..
-# DIS-NEXT: 4001c0 ff0df945 830f000c 00799007 22ff0000 ...E.....y.."...
-# DIS-NEXT: 4001d0 9945020f 00798e07 22ff0000 9945020f .E...y.."....E..
+# DIS-NEXT: 4001c8: 00 79 90 07 addiupc $2, 7744
+# DIS-NEXT: 4001cc: 22 ff 00 00 lw $25, 0($2)
+# DIS-NEXT: 4001d0: 99 45 jr16 $25
+# DIS-NEXT: 4001d2: 02 0f move $24, $2
+
+# DIS-NEXT: 4001d4: 00 79 8e 07 addiupc $2, 7736
+# DIS-NEXT: 4001d8: 22 ff 00 00 lw $25, 0($2)
+# DIS-NEXT: 4001dc: 99 45 jr16 $25
+# DIS-NEXT: 4001de: 02 0f move $24, $2
# PLT-SYM: Relocations [
# PLT-SYM-NEXT: Section (5) .rel.dyn {
Modified: lld/trunk/test/elf/Mips/rel-dynamic-03-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-dynamic-03-micro.test?rev=227059&r1=227058&r2=227059&view=diff
==============================================================================
--- lld/trunk/test/elf/Mips/rel-dynamic-03-micro.test (original)
+++ lld/trunk/test/elf/Mips/rel-dynamic-03-micro.test Sun Jan 25 15:31:52 2015
@@ -15,16 +15,25 @@
# RUN: lld -flavor gnu -target mipsel -shared -o %t.so %t-so.o
# RUN: yaml2obj -format=elf -docnum 2 %s > %t-o.o
# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t-o.o %t.so
-# RUN: llvm-objdump -s %t.exe | FileCheck -check-prefix=DIS %s
+# RUN: llvm-objdump -d -mattr=micromips %t.exe | FileCheck -check-prefix=DIS %s
# RUN: llvm-readobj -dt -r %t.exe | FileCheck -check-prefix=PLT-SYM %s
-# FIXME (simon): Check the disassembler output when llvm-objdump starts
-# to support microMIPS instruction encoding.
+# DIS: Disassembly of section .plt:
+# DIS-NEXT: .plt:
+# DIS-NEXT: 400170: 80 79 a4 07 addiupc $3, 7824
+# DIS-NEXT: 400174: 23 ff 00 00 lw $25, 0($3)
+# DIS-NEXT: 400178: 35 05 subu16 $2, $2, $3
+# DIS-NEXT: 40017a: 25 25 srl16 $2, $2, 2
+# DIS-NEXT: 40017c: 02 33 fe ff addiu $24, $2, -2
+# DIS-NEXT: 400180: ff 0d move $15, $ra
+# DIS-NEXT: 400182: f9 45 jalrs16 $25
+# DIS-NEXT: 400184: 83 0f move $gp, $3
+# DIS-NEXT: 400186: 00 0c nop
-# DIS: Contents of section .plt:
-# DIS-NEXT: 400170 8079a407 23ff0000 35052525 0233feff .y..#...5.%%.3..
-# DIS-NEXT: 400180 ff0df945 830f000c 0079a007 22ff0000 ...E.....y.."...
-# DIS-NEXT: 400190 9945020f .E..
+# DIS-NEXT: 400188: 00 79 a0 07 addiupc $2, 7808
+# DIS-NEXT: 40018c: 22 ff 00 00 lw $25, 0($2)
+# DIS-NEXT: 400190: 99 45 jr16 $25
+# DIS-NEXT: 400192: 02 0f move $24, $2
# PLT-SYM: Relocations [
# PLT-SYM-NEXT: Section (5) .rel.plt {
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