[PATCH] Add tail call optimization for thumb1-only targets rev. 3

[Jim Grosbach]

In http://reviews.llvm.org/D7005#110256, @Langohr wrote:

> When re-analyzing prologue and epilogue generation code for thumb1, it seems to me that there is another issue related to the fix done in r210889. The code in head still refers to DPR registers within a possibly available VFP unit and corresponding register spilling and restoring. For thumb1, DPR registers are, however, inaccessible. Prologue and epilogue, thus, should only consider AAPCS calling convention and not AAPCS-VFP. I doubt that this part of the code had shown up as part of copy-and-paste from thumb2/ARM code.?


It's required to support ARM/Thumb interworking when using SjLj exceptions.


http://reviews.llvm.org/D7005

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