[PATCH] [PATCH][mips] Add range checks and transformation to octeon instructions in AsmParser.

[Daniel Sanders]

LGTM with a couple nits.


REPOSITORY
  rL LLVM

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1177
@@ -1170,1 +1176,3 @@
+    case Mips::BBIT132:
+      assert(hasCnMips() && "instruction only valid for octeon cpus");
     case Mips::BEQ:
----------------
Please add a comment to show that the fall through is deliberate.

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1254
@@ +1253,3 @@
+        assert(MCID.getNumOperands() == 3 && "unexpected number of operands");
+        /* The offset is handled above */
+        Opnd = Inst.getOperand(1);
----------------
C++ style comments are preferred. Likewise for the others below.

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1264
@@ +1263,3 @@
+          Inst.setOpcode(Opcode == Mips::BBIT0 ? Mips::BBIT032
+            : Mips::BBIT132);
+          Inst.getOperand(1).setImm(Imm - 32);
----------------
Indentation. The ':' should line up with the '?'.

http://reviews.llvm.org/D7080

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