[PATCH] [ARM] Fix issue with SMLAL (Signed Multiply Accumulate Long) lowering
t.p.northover at gmail.com
Thu Jan 15 12:46:03 PST 2015
This doesn't look like the right fix: just because AddcOp0 is *some* SMUL_LOHI doesn't mean AddcOp1 isn't the right one. This patch just perturbs which one we investigate slightly and works in this case but will probably make an equal number worse.
Comment at: ../llvm/test/CodeGen/ARM/longMAC.ll:81
@@ +80,3 @@
+ %conv = sext i32 %a to i64
We should probably test the actual dataflow here, rather than just the existence of an smlal instruction.
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