[llvm] r225209 - [PowerPC] Add a test for truncating a shifted load

[Hal Finkel]

Author: hfinkel
Date: Mon Jan  5 15:33:14 2015
New Revision: 225209

URL: http://llvm.org/viewvc/llvm-project?rev=225209&view=rev
Log:
[PowerPC] Add a test for truncating a shifted load

We now produce the desired code as noted in the README.txt file. Remove the
README entry and add a regression test.

Added:
    llvm/trunk/test/CodeGen/PowerPC/lbz-from-ld-shift.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/README.txt

Modified: llvm/trunk/lib/Target/PowerPC/README.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/README.txt?rev=225209&r1=225208&r2=225209&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/README.txt (original)
+++ llvm/trunk/lib/Target/PowerPC/README.txt Mon Jan  5 15:33:14 2015
@@ -255,24 +255,6 @@ int f(signed char *a, _Bool b, _Bool c)
 
 ===-------------------------------------------------------------------------===
 
-This:
-int test(unsigned *P) { return *P >> 24; }
-
-Should compile to:
-
-_test:
-        lbz r3,0(r3)
-        blr
-
-not:
-
-_test:
-        lwz r2, 0(r3)
-        srwi r3, r2, 24
-        blr
-
-===-------------------------------------------------------------------------===
-
 On the G5, logical CR operations are more expensive in their three
 address form: ops that read/write the same register are half as expensive as
 those that read from two registers that are different from their destination.

Added: llvm/trunk/test/CodeGen/PowerPC/lbz-from-ld-shift.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/lbz-from-ld-shift.ll?rev=225209&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/lbz-from-ld-shift.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/lbz-from-ld-shift.ll Mon Jan  5 15:33:14 2015
@@ -0,0 +1,18 @@
+; RUN: llc -mcpu=ppc64 < %s | FileCheck %s
+target datalayout = "E-m:e-i64:64-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+; Function Attrs: nounwind readonly
+define signext i32 @test(i32* nocapture readonly %P) #0 {
+entry:
+  %0 = load i32* %P, align 4
+  %shr = lshr i32 %0, 24
+  ret i32 %shr
+
+; CHECK-LABEL: @test
+; CHECK: lbz 3, 0(3)
+; CHECK: blr
+}
+
+attributes #0 = { nounwind readonly }
+