[PATCH] [AArch64] Improve codegen of store lane instructions by avoiding GPR usage

[Ahmed Bougacha]

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D6202

Files:
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/test/CodeGen/AArch64/arm64-st1.ll

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D6202.17806.patch
Type: text/x-patch
Size: 6621 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150105/cd3db663/attachment.bin>