[PATCH] [AArch64] Improve codegen of store lane 0 instructions by directly storing the subregister.

[Ahmed Bougacha]

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D6772

Files:
  llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/trunk/test/CodeGen/AArch64/arm64-st1.ll

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/
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