[PATCH] [X86][SSE] Keep 4i32 vector insertions in integer domain on pre-SSE4.1 targets

[Chandler Carruth]

On Fri, Dec 12, 2014 at 3:22 PM, Simon Pilgrim <llvm-dev at redking.me.uk>
wrote:
>
> Chandler - if you have no complaints I’d like to commit the additional
> X86vzmovl folded tests right away as it requires no alterations to codegen
> - its just adding missing tests.
>

Of course. =] Such things fall under the "obvious" bucket for me, so feel
free to just commit them.


>
> For replacing the MOVQ+PSHUFD with an AND with constant mask  - is there
> a decent way of doing this in the X86InstrSSE.td patterns? I can’t fathom
> how I’d declare the constant vector, nor how I’d make it fold or pre-load
> the constant.
>

I don't think you need to think about folding, or hoisting out of a loop.
Subsequent MI level stuff should handle that. You can maybe look at
V_SETALLONES for inspiration on how to conjure such a vector constant?
Sadly, I'm not a tablegen expert.


> I can add it to lowerVectorShuffleAsElementInsertion easily enough but its
> kind of missing the point.
>

Yea, but the point of it is to handle the cases that we don't have good
tablegen techniques for, so we may have to explicitly manage more of
this.... But I'm hopeful this can be matched effectively in tablegen.
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