[PATCH] optimize merging of scalar loads for 32-byte vectors [X86, AVX] (PR21710)

[Simon Pilgrim]

Tested with some basic internal tests - no problems encountered (and folding seems to work well too).

I also tested integer (i64, i32, i16, i8) sequential loads and that optimized as expected too - not sure if its worth adding tests for these or not?

Come to think of it I should have tested D6492 as well while I was doing these......

LGTM

http://reviews.llvm.org/D6536