[PATCH] [RFC PATCH] BPF backend

[Alexei Starovoitov]

On Wed, Dec 3, 2014 at 3:11 PM, Tom Stellard <tom at stellard.net> wrote:
>> > Comment at: lib/Target/BPF/BPFInstrInfo.td:501-504
>> > @@ +500,6 @@
>> > +
>> > +class LOAD_IND<bits<2> sizeOp, string asmstr, Intrinsic opNode>
>> > +  : InstBPF<(outs), (ins GPR:$skb, GPR:$val),
>> > +            !strconcat(asmstr, "\tr0, $skb.data + $val"),
>> > +            [(set R0, (opNode GPR:$skb, GPR:$val))]> {
>> > +  bits<3> mode;
>> > ----------------
>> > I did not realize this was possible.  Does the instruction selector add R0 as an implicit def?
>>
>> yep. it looks like this:
>>  LD_ABS_H %R6, 12, %R0<imp-def>, %R1<imp-def,dead>, %R2<imp-def,dead>,
>> %R3<imp-def,dead>, %R4<imp-def,dead>, %R5<imp-def,dead>, %R6<imp-use>
>>  %vreg57<def> = COPY %R0; GPR:%vreg57
>>
>> I'm not sure it's documented, since I don't see other backends use it.
>> Should I change to something else?
>> What's a recommended approach?
>>
>
> It's fine as is, I just wanted to know how it worked so I could use it too.

actually several backends use it as well.
arm uses it as:
[(set R0, (ARMeh_sjlj_setjmp GPR:$src, GPR:$val))]
xcore does:
[(set R11, (cprelwrapper tglobaladdr:$a))]
and x86:
[(set EFLAGS, (OpNode (vt RC:$src1), RC:$src2))]