[PATCH][AVX512] Add 512b integer shift by variable patterns and intrinsics

[Demikhovsky, Elena]

EVEX_V512 should be added to "Z" form, because we'll add "Z256"/"Z128" with EVEX_V256/128.

All other LGTM

-  Elena


-----Original Message-----
From: Cameron McInally [mailto:cameron.mcinally at nyu.edu] 
Sent: Tuesday, November 25, 2014 18:26
To: Demikhovsky, Elena
Cc: llvm-commits at cs.uiuc.edu; Robert Khasanov
Subject: Re: [PATCH][AVX512] Add 512b integer shift by variable patterns and intrinsics

On Thu, Nov 20, 2014 at 2:01 AM, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote:
> I think that you should organize template classes in a form convenient for adding VLI.
> I agree that instructions their self may be added later.
>
> -  Elena
>
>
> -----Original Message-----
> From: Cameron McInally [mailto:cameron.mcinally at nyu.edu]
> Sent: Wednesday, November 19, 2014 15:58
> To: Demikhovsky, Elena
> Cc: llvm-commits at cs.uiuc.edu; Robert Khasanov
> Subject: Re: [PATCH][AVX512] Add 512b integer shift by variable 
> patterns and intrinsics
>
> Hi Elena,
>
> I've attached an updated patch that adds the "_mask" suffix to the GNU builtin names and also updates the AVX512BIBase base class.
>
> If it's okay with you, I'd like to add the AVX512VL variants under a 
> separate patch. Is that okay with you? ;)
>
> -Cam
>
> On Wed, Nov 19, 2014 at 2:24 AM, Demikhovsky, Elena <elena.demikhovsky at intel.com> wrote:
>> Hi Cam,
>>
>> The GCC built-in names are incorrect. Please look here 
>> https://gcc.gnu.org/svn/gcc/branches/avx512-vlbwdq/gcc/config/i386/av
>> x
>> 512fintrin.h
>>  for the reference.
>>
>> I also suggest to put two more multiclasses in the middle, we'll need to add "W" form as well.
>>
>> +defm VPSRLDZ : avx512_shift_rrm<0xD2, "vpsrld", X86vsrl, v4i32, bc_v4i32, v16i32_info>,
>> +                           EVEX_V512, EVEX_CD8<32, CD8VQ>; defm 
>> +VPSRLQZ : avx512_shift_rrm<0xD3, "vpsrlq", X86vsrl, v2i64, bc_v2i64, v8i64_info>,
>> +                           EVEX_V512, EVEX_CD8<64, CD8VQ>, VEX_W;
>>
>> I suggest something to write like this:
>>
>> multiclass avx512_varshift_sizes <>{
>> defm Z:           avx512_shift_rrm<opc..>, EVEX_V512
>> defm Z256:     avx512_shift_rrm<opc..>, EVEX_V256
>> defm Z128:     avx512_shift_rrm<opc.. ..>, EVEX_V128
>> }
>>
>> multiclass avx512_varshift_types < bits<8> opcd, bits<8> opcq, 
>> bits<8> opcqw, string OpcodeStr, SDNode OpNode > { defm D:
>> avx512_varshift_sizes <opcd, OpcodeStr#"d", OpNode, v4i32, bc_v4i32, 
>> .. >, EVEX_CD8<32, CD8VQ> defm Q: avx512_varshift_sizes <opcq, OpcodeStr#"q", OpNode, v2i64, bc_v2i64 ..>, EVEX_CD8<64, CD8VQ>, VEX_W defm W:
>> }
>> defm VPSRL : avx512_varshift_types <0xD2, 0xD3, 0xD1
>>
>>
>>
>>
>> -  Elena
>>
>>
>> -----Original Message-----
>> From: Cameron McInally [mailto:cameron.mcinally at nyu.edu]
>> Sent: Tuesday, November 18, 2014 22:34
>> To: llvm-commits at cs.uiuc.edu
>> Cc: Demikhovsky, Elena; Robert Khasanov
>> Subject: [PATCH][AVX512] Add 512b integer shift by variable patterns 
>> and intrinsics
>>
>> Hey guys,
>>
>> Attached is a patch to support 512b integer shift by variable intrinsics for AVX512.
>>
>> Thanks,
>> Cam
>> ---------------------------------------------------------------------
>> Intel Israel (74) Limited
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> Intel Israel (74) Limited
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Hey Elena,

Sorry for the slow reply. An updated patch is attached...

-Cam
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