[llvm] r222285 - R600/SI: Set hasSideEffects = 0 on load and store instructions.

[Matt Arsenault]

Author: arsenm
Date: Tue Nov 18 17:57:33 2014
New Revision: 222285

URL: http://llvm.org/viewvc/llvm-project?rev=222285&view=rev
Log:
R600/SI: Set hasSideEffects = 0 on load and store instructions.

Assuming unmodeled side effects interferes with some scheduling
opportunities.

Don't put it in the base class of DS instructions since there
are a few weird effecting, non load/store instructions there.

Modified:
    llvm/trunk/lib/Target/R600/SIInstrFormats.td
    llvm/trunk/lib/Target/R600/SIInstrInfo.td

Modified: llvm/trunk/lib/Target/R600/SIInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrFormats.td?rev=222285&r1=222284&r2=222285&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrFormats.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstrFormats.td Tue Nov 18 17:57:33 2014
@@ -223,6 +223,7 @@ class SMRD <dag outs, dag ins, string as
   let SMRD = 1;
   let mayStore = 0;
   let mayLoad = 1;
+  let hasSideEffects = 0;
   let UseNamedOperandTable = 1;
 }
 
@@ -527,10 +528,9 @@ class VOPC <bits<8> op, dag ins, string
 
 class VINTRP <bits <2> op, dag outs, dag ins, string asm, list<dag> pattern> :
     InstSI <outs, ins, asm, pattern>, VINTRPe<op> {
-
-  let neverHasSideEffects = 1;
   let mayLoad = 1;
   let mayStore = 0;
+  let hasSideEffects = 0;
 }
 
 } // End Uses = [EXEC]
@@ -555,7 +555,7 @@ class MUBUF <bits<7> op, dag outs, dag i
   let EXP_CNT = 1;
   let MUBUF = 1;
 
-  let neverHasSideEffects = 1;
+  let hasSideEffects = 0;
   let UseNamedOperandTable = 1;
 }
 
@@ -591,6 +591,8 @@ class MIMG <bits<7> op, dag outs, dag in
   let VM_CNT = 1;
   let EXP_CNT = 1;
   let MIMG = 1;
+
+  let hasSideEffects = 0; // XXX ????
 }
 
 

Modified: llvm/trunk/lib/Target/R600/SIInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrInfo.td?rev=222285&r1=222284&r2=222285&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrInfo.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstrInfo.td Tue Nov 18 17:57:33 2014
@@ -941,6 +941,8 @@ class DS_1A <bits<8> op, dag outs, dag i
   // Single load interpret the 2 i8imm operands as a single i16 offset.
   let offset0 = offset{7-0};
   let offset1 = offset{15-8};
+
+  let hasSideEffects = 0;
 }
 
 class DS_Load_Helper <bits<8> op, string asm, RegisterClass regClass> : DS_1A <
@@ -965,6 +967,7 @@ class DS_Load2_Helper <bits<8> op, strin
   let data1 = 0;
   let mayLoad = 1;
   let mayStore = 0;
+  let hasSideEffects = 0;
 }
 
 class DS_Store_Helper <bits<8> op, string asm, RegisterClass regClass> : DS_1A <
@@ -988,6 +991,7 @@ class DS_Store2_Helper <bits<8> op, stri
   []> {
   let mayStore = 1;
   let mayLoad = 0;
+  let hasSideEffects = 0;
   let vdst = 0;
 }
 
@@ -1016,7 +1020,6 @@ class DS_1A2D_RET <bits<8> op, string as
   AtomicNoRet<noRetOp, 1> {
   let mayStore = 1;
   let mayLoad = 1;
-
   let hasPostISelHook = 1; // Adjusted to no return version.
 }