[PATCH] R600/SI: Enable inline assembly

Matt Arsenault arsenm2 at gmail.com
Fri Nov 14 19:44:30 PST 2014


> On Nov 14, 2014, at 6:28 PM, Tom Stellard <thomas.stellard at amd.com> wrote:
> 
> We just needed to remove the assertion in
> AMDGPURegisterInfo::getFrameRegister(), which is called when
> initializing the parser for inline assembly.
> ---
> lib/Target/R600/AMDGPURegisterInfo.cpp |  1 -
> test/CodeGen/R600/inline-asm.ll        | 11 +++++++++++
> 2 files changed, 11 insertions(+), 1 deletion(-)
> create mode 100644 test/CodeGen/R600/inline-asm.ll
> 
> diff --git a/lib/Target/R600/AMDGPURegisterInfo.cpp b/lib/Target/R600/AMDGPURegisterInfo.cpp
> index 3433280..9fef2da 100644
> --- a/lib/Target/R600/AMDGPURegisterInfo.cpp
> +++ b/lib/Target/R600/AMDGPURegisterInfo.cpp
> @@ -42,7 +42,6 @@ void AMDGPURegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
> }
> 
> unsigned AMDGPURegisterInfo::getFrameRegister(const MachineFunction &MF) const {
> -  assert(!"Subroutines not supported yet");
>   return 0;
> }
Probably should change this to AMDGPU::NoRegister

> 
> diff --git a/test/CodeGen/R600/inline-asm.ll b/test/CodeGen/R600/inline-asm.ll
> new file mode 100644
> index 0000000..6f1f977
> --- /dev/null
> +++ b/test/CodeGen/R600/inline-asm.ll
> @@ -0,0 +1,11 @@
> +; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s
> +
> +; CHECK: {{^}}inline_asm:
> +; CHECK: s_endpgm
> +; CHECK: s_endpgm
> +define void @inline_asm(i32 addrspace(1)* %out) {
> +entry:
> +  store i32 5, i32 addrspace(1)* %out
> +  call void asm sideeffect "s_endpgm", ""()
> +  ret void
> +}
> -- 
> 1.8.1.5
> 
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LGTM



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