[PATCH] [AArch64] Fix fast-isel of cbz of i1, i8, i16

[Juergen Ributzka]

Hi Oliver,

thanks for catching this. I only have a minor comment inline.
It would be great if you also could optimize the i1 case by emitting a 'tbs' instead. Maybe in a separate commit?

Thanks and LGTM.

-Juergen

================
Comment at: lib/Target/AArch64/AArch64FastISel.cpp:2185
@@ +2184,3 @@
+  if ((BW == 1 || BW == 8 || BW == 16) && !IsBitTest) {
+    EVT CmpEVT = TLI.getValueType(Ty, SrcIsKill);
+    SrcReg =
----------------
getValueType doesn't use kill flags - a simple 'true' will do here.

================
Comment at: test/CodeGen/AArch64/fast-isel-cbz.ll:3
@@ -2,3 +2,3 @@
 
-define i32 @icmp_eq_i1(i1 signext %a) {
+define i32 @icmp_eq_i1(i1 %a) {
 ; CHECK-LABEL: icmp_eq_i1
----------------
This case could be optimized to use tbz instead.

http://reviews.llvm.org/D5935