[PATCH 2/3] SelectionDAG: Don't do libcall on div/rem if divrem is custom

[Jan Vesely]

CC: Owen Anderson <resistor at mac.com>
Signed-off-by: Jan Vesely <jan.vesely at rutgers.edu>
---
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 29 +++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 3e5f7dd..e0dc2bd 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -2101,6 +2101,13 @@ void DAGTypeLegalizer::ExpandIntRes_SDIV(SDNode *N,
   EVT VT = N->getValueType(0);
   SDLoc dl(N);
 
+  if (TLI.getOperationAction(ISD::SDIVREM, VT) == TargetLoweringBase::Custom) {
+    SDValue RES = DAG.getNode(ISD::SDIVREM, dl, DAG.getVTList(VT, VT),
+                              N->getOperand(0), N->getOperand(1));
+    SplitInteger(RES, Lo, Hi);
+    return;
+  }
+
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
   if (VT == MVT::i16)
     LC = RTLIB::SDIV_I16;
@@ -2280,6 +2287,13 @@ void DAGTypeLegalizer::ExpandIntRes_SREM(SDNode *N,
   EVT VT = N->getValueType(0);
   SDLoc dl(N);
 
+  if (TLI.getOperationAction(ISD::SDIVREM, VT) == TargetLoweringBase::Custom) {
+    SDValue RES = DAG.getNode(ISD::SDIVREM, dl, DAG.getVTList(VT, VT),
+                              N->getOperand(0), N->getOperand(1));
+    SplitInteger(RES.getValue(1), Lo, Hi);
+    return;
+  }
+
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
   if (VT == MVT::i16)
     LC = RTLIB::SREM_I16;
@@ -2420,6 +2434,13 @@ void DAGTypeLegalizer::ExpandIntRes_UDIV(SDNode *N,
   EVT VT = N->getValueType(0);
   SDLoc dl(N);
 
+  if (TLI.getOperationAction(ISD::UDIVREM, VT) == TargetLoweringBase::Custom) {
+    SDValue RES = DAG.getNode(ISD::UDIVREM, dl, DAG.getVTList(VT, VT),
+                              N->getOperand(0), N->getOperand(1));
+    SplitInteger(RES, Lo, Hi);
+    return;
+  }
+
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
   if (VT == MVT::i16)
     LC = RTLIB::UDIV_I16;
@@ -2440,6 +2461,14 @@ void DAGTypeLegalizer::ExpandIntRes_UREM(SDNode *N,
   EVT VT = N->getValueType(0);
   SDLoc dl(N);
 
+  if (TLI.getOperationAction(ISD::UDIVREM, VT) == TargetLoweringBase::Custom) {
+    SDValue RES = DAG.getNode(ISD::UDIVREM, dl, DAG.getVTList(VT, VT),
+                              N->getOperand(0), N->getOperand(1));
+    SplitInteger(RES.getValue(1), Lo, Hi);
+    return;
+  }
+
+
   RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
   if (VT == MVT::i16)
     LC = RTLIB::UREM_I16;
-- 
1.9.3