[llvm] r219581 - llvm/test/CodeGen: Some tests don't REQUIRE asserts any more. Remove them.

[NAKAMURA Takumi]

Author: chapuni
Date: Sun Oct 12 01:47:47 2014
New Revision: 219581

URL: http://llvm.org/viewvc/llvm-project?rev=219581&view=rev
Log:
llvm/test/CodeGen: Some tests don't REQUIRE asserts any more. Remove them.

Modified:
    llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll
    llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll
    llvm/trunk/test/CodeGen/AArch64/fast-isel-switch-phi.ll
    llvm/trunk/test/CodeGen/R600/big_alu.ll
    llvm/trunk/test/CodeGen/R600/load-input-fold.ll
    llvm/trunk/test/CodeGen/R600/r600-infinite-loop-bug-while-reorganizing-vector.ll
    llvm/trunk/test/CodeGen/R600/r600cfg.ll
    llvm/trunk/test/CodeGen/X86/fast-isel-args-fail.ll

Modified: llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll?rev=219581&r1=219580&r2=219581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-abi.ll Sun Oct 12 01:47:47 2014
@@ -1,6 +1,5 @@
 ; RUN: llc     -mtriple=arm64-apple-darwin -mcpu=cyclone -enable-misched=false < %s | FileCheck %s
 ; RUN: llc -O0 -mtriple=arm64-apple-darwin                                     < %s | FileCheck --check-prefix=FAST %s
-; REQUIRES: asserts
 
 ; rdar://9932559
 define i64 @i8i16callee(i64 %a1, i64 %a2, i64 %a3, i8 signext %a4, i16 signext %a5, i64 %a6, i64 %a7, i64 %a8, i8 signext %b1, i16 signext %b2, i8 signext %b3, i8 signext %b4) nounwind readnone noinline {

Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll?rev=219581&r1=219580&r2=219581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-rem.ll Sun Oct 12 01:47:47 2014
@@ -1,7 +1,6 @@
 ; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
 ; RUN: llc %s -O0 -fast-isel-abort -mtriple=arm64-apple-darwin -print-machineinstrs=expand-isel-pseudos -o /dev/null 2> %t
 ; RUN: FileCheck %s < %t --check-prefix=CHECK-SSA
-; REQUIRES: asserts
 
 ; CHECK-SSA-LABEL: Machine code for function t1
 

Modified: llvm/trunk/test/CodeGen/AArch64/fast-isel-switch-phi.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/fast-isel-switch-phi.ll?rev=219581&r1=219580&r2=219581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/fast-isel-switch-phi.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/fast-isel-switch-phi.ll Sun Oct 12 01:47:47 2014
@@ -1,5 +1,4 @@
 ; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs < %s
-; REQUIRES: asserts
 
 ; Test that the Machine Instruction PHI node doesn't have more than one operand
 ; from the same predecessor.

Modified: llvm/trunk/test/CodeGen/R600/big_alu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/big_alu.ll?rev=219581&r1=219580&r2=219581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/big_alu.ll (original)
+++ llvm/trunk/test/CodeGen/R600/big_alu.ll Sun Oct 12 01:47:47 2014
@@ -1,5 +1,4 @@
 ;RUN: llc < %s -march=r600 -mcpu=cedar
-;REQUIRES: asserts
 
 ;This test ensures that R600 backend can handle ifcvt properly
 ;and do not generate ALU clauses with more than 128 instructions.

Modified: llvm/trunk/test/CodeGen/R600/load-input-fold.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/load-input-fold.ll?rev=219581&r1=219580&r2=219581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/load-input-fold.ll (original)
+++ llvm/trunk/test/CodeGen/R600/load-input-fold.ll Sun Oct 12 01:47:47 2014
@@ -1,5 +1,4 @@
 ;RUN: llc < %s -march=r600 -mcpu=cayman
-;REQUIRES: asserts
 
 define void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1, <4 x float> inreg %reg2, <4 x float> inreg %reg3) #0 {
 main_body:

Modified: llvm/trunk/test/CodeGen/R600/r600-infinite-loop-bug-while-reorganizing-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/r600-infinite-loop-bug-while-reorganizing-vector.ll?rev=219581&r1=219580&r2=219581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/r600-infinite-loop-bug-while-reorganizing-vector.ll (original)
+++ llvm/trunk/test/CodeGen/R600/r600-infinite-loop-bug-while-reorganizing-vector.ll Sun Oct 12 01:47:47 2014
@@ -1,5 +1,4 @@
 ;RUN: llc < %s -march=r600 -mcpu=cayman
-;REQUIRES: asserts
 
 define void @main(<4 x float> inreg, <4 x float> inreg) #0 {
 main_body:

Modified: llvm/trunk/test/CodeGen/R600/r600cfg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/R600/r600cfg.ll?rev=219581&r1=219580&r2=219581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/R600/r600cfg.ll (original)
+++ llvm/trunk/test/CodeGen/R600/r600cfg.ll Sun Oct 12 01:47:47 2014
@@ -1,5 +1,4 @@
 ;RUN: llc < %s -march=r600 -mcpu=redwood
-;REQUIRES: asserts
 
 define void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1) #0 {
 main_body:

Modified: llvm/trunk/test/CodeGen/X86/fast-isel-args-fail.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fast-isel-args-fail.ll?rev=219581&r1=219580&r2=219581&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fast-isel-args-fail.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fast-isel-args-fail.ll Sun Oct 12 01:47:47 2014
@@ -1,7 +1,6 @@
 ; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-apple-darwin10
 ; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN32
 ; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win64 | FileCheck %s -check-prefix=WIN64
-; REQUIRES: asserts
 
 ; Previously, this would cause an assert.
 define i31 @t1(i31 %a, i31 %b, i31 %c) {