[PATCH] [llvm] [Hexagon] Adding tests, TableGen entries, and code for emitting add opcode.

[colinl at codeaurora.org]

>>! In D5624#12, @rafael wrote:
>> That is right.  The hexagon assembly language syntax is somewhat C-like and violates some of the assumptions the MC assembler makes.
>>
>> We want to get the TD files updated with encoding bits and update the rest of MCTargetDesc so that object files can be directly emitted.  Using this test framework allows us to add the encoding bits and have a directed test for each instruction.
> 
> Can you test the encoding with disassembler tests? Even if is printing
> in a sudo-hexagon syntax for now that should be sufficient for
> testing. I am afraid that using gtest for instruction encoding might
> get even messier then the clang-format tests.
> 
> Cheers,
> Rafael

Disassembler tests might be possible, I hadn't considered that before.  We had thought the gtests would be sufficient since the inputs and outputs shouldn't vary as time goes on since the instructions and their encoding are tied to existing hardware.

What types of problems with clang-format tests are we looking to avoid?  We have a fair number of instructions with running gtests we have pretty much prepped for upstreaming and haven't encountered any problems but we want to avoid something maybe we haven't thought of.

http://reviews.llvm.org/D5624