[PATCH] [PATCH] Test case and FastISel fixes with FeatureVSX enabled
Bill Schmidt
wschmidt at linux.vnet.ibm.com
Wed Oct 8 16:37:57 PDT 2014
Bill, probably best to split this into a patch for the fast-isel bits
and at least one other for the other "miscellaneous VSX workarounds" for
now. Sorry, I should probably have given you better guidance there.
Regarding changing the fast-isel test with the -mattr=-vsx options, I
still think this is a reasonable approach. We are still testing what we
intended to test, and when VSX is enabled for fast-isel we will have to
provide different checks for the different intended code sequences;
these tests will all be revisited at that time.
I failed to notice the generic code-gen test; we'll have to look at that
one and see how that can be handled otherwise.
Thanks,
Bill
On Wed, 2014-10-08 at 16:09 -0700, Eric Christopher wrote:
> OK, after some more looking I see where you're going with this. I
> think the various bits can be unified under the isTypeLegal I brought
> up before and making that virtual with the simple check it looks like
> all of them check for MVT::isSimple() first.. You might need to pull
> out the Other check though.
>
> Few comments on the patch otherwise:
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/Generic/select-cc.ll
> @@ -1,4 +1,4 @@
> -; RUN: llc < %s
> +; RUN: llc -mattr=-vsx < %s
>
> This is a generic codegen test. You can't change it this way.
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/2007-09-08-unaligned.ll
> @@ -1,7 +1,11 @@
> -; RUN: llc < %s | grep stfd | count 3
> -; RUN: llc < %s | grep stfs | count 1
> -; RUN: llc < %s | grep lfd | count 2
> -; RUN: llc < %s | grep lfs | count 2
> +; RUN: llc -mattr=-vsx < %s | grep stfd | count 3
> +; RUN: llc -mattr=-vsx < %s | grep stfs | count 1
> +; RUN: llc -mattr=-vsx < %s | grep lfd | count 2
> +; RUN: llc -mattr=-vsx < %s | grep lfs | count 2
> +; RUN: llc -mattr=+vsx < %s | grep stxsdx | count 3
> +; RUN: llc -mattr=+vsx < %s | grep stfs | count 1
> +; RUN: llc -mattr=+vsx < %s | grep lxsdx | count 2
> +; RUN: llc -mattr=+vsx < %s | grep lfs | count 2
>
> This appears unrelated to fast-isel?
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/2012-10-12-bitcast.ll
> @@ -1,4 +1,5 @@
> -; RUN: llc -mattr=+altivec < %s | FileCheck %s
> +; RUN: llc -mattr=-vsx -mattr=+altivec < %s | FileCheck %s
> +; RUN: llc -mattr=+vsx -mattr=+altivec < %s | FileCheck -check-prefix=VSX %s
>
> Ditto.
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/buildvec_canonicalize.ll
> @@ -1,4 +1,5 @@
> -; RUN: llc < %s -march=ppc32 -mattr=+altivec --enable-unsafe-fp-math
> | FileCheck %s
> +; RUN: llc < %s -mattr=-vsx -march=ppc32 -mattr=+altivec
> --enable-unsafe-fp-math | FileCheck %s
> +; RUN: llc < %s -mattr=+vsx -march=ppc32 -mattr=+altivec
> --enable-unsafe-fp-math | FileCheck -check-prefix=VSX %s
>
> Ditto.
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/copysignl.ll
> @@ -1,4 +1,5 @@
> -; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s
> +; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu
> -mattr=-vsx < %s | FileCheck %s -check-prefix=NOVSX
> +; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu
> -mattr=+vsx < %s | FileCheck %s -check-prefix=VSX
>
> Ditto.
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fabs.ll
> @@ -1,4 +1,5 @@
> -; RUN: llc < %s -march=ppc32 -mtriple=powerpc-apple-darwin | grep "fabs f1, f1"
> +; RUN: llc < %s -mattr=-vsx -march=ppc32
> -mtriple=powerpc-apple-darwin | grep "fabs f1, f1"
> +; RUN: llc < %s -mattr=+vsx -march=ppc32
> -mtriple=powerpc-apple-darwin | grep "xsabsdp f1, f1"
>
> Ditto.
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fast-isel-call.ll
> @@ -1,4 +1,4 @@
> -; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort
> -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
> --check-prefix=ELF64
> +; RUN: llc < %s -O0 -verify-machineinstrs -mattr=-vsx
> -fast-isel-abort -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 |
> FileCheck %s --check-prefix=ELF64
>
> Do we really want to change almost every pwr7 fast isel test to remove
> the vsx attribute just because bits of the tests don't work? I'm not
> sure I've got a better solution, but this seems really heavy handed.
>
> -; ELF64-LABEL: ret2
> +; ELF64: ret2
>
> Seems an orthogonal change?
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fma.ll
> @@ -1,4 +1,4 @@
> -; RUN: llc < %s -march=ppc32 -fp-contract=fast | FileCheck %s
> +; RUN: llc < %s -mattr=-vsx -march=ppc32 -fp-contract=fast | FileCheck %s
>
> This appears unrelated to fast-isel? (Along with everything that
> doesn't use -O0 on the llc command line).
>
> +++ /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fsel.ll
> @@ -1,5 +1,6 @@
> -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s
> -; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7
> -enable-no-infs-fp-math -enable-no-nans-fp-math | FileCheck
> -check-prefix=CHECK-FM %s
> +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7
> -mattr=-vsx | FileCheck %s
> +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7
> -enable-no-infs-fp-math -enable-no-nans-fp-math -mattr=-vsx |
> FileCheck -check-prefix=CHECK-FM %s
> +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7
> -enable-no-infs-fp-math -enable-no-nans-fp-math -mattr=+vsx |
> FileCheck -check-prefix=CHECK-FM-VSX %s
> target datalayout =
> "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
> target triple = "powerpc64-unknown-linux-gnu"
>
> @@ -16,6 +17,10 @@
> ; CHECK-FM: @zerocmp1
> ; CHECK-FM: fsel 1, 1, 2, 3
> ; CHECK-FM: blr
> +
> +; CHECK-FM-VSX: @zerocmp1
> +; CHECK-FM-VSX: fsel 1, 1, 2, 3
> +; CHECK-FM-VSX: blr
>
> Another orthogonal test change?
>
> There's more seemingly of these as well, but calling out each one
> separately seems to be a bit verbose.
>
> Thoughts?
>
> -eric
>
>
> On Wed, Oct 8, 2014 at 1:52 PM, Eric Christopher <echristo at gmail.com> wrote:
> > Not such a huge fan of the new EVT code. This is what the Type *, MVT
> > & code is for. What's giving you an EVT where you're not checking for
> > simple?
> >
> > I.e. I see no reason this shouldn't work like:
> >
> > bool PPCFastISel::isTypeLegal(Type *Ty, MVT &VT) {
> > EVT E = TLI.getValueType(Ty, true);
> >
> > // Only handle simple types.
> > if (E == MVT::Other || !E.isSimple())
> > return false;
> > VT = E.getSimpleVT();
> >
> > if (VT == MVT::f64 || VT.isVector())
> > return false;
> >
> > return TLI.isTypeLegal(VT);
> > }
> >
> > (though do we handle f64 or vectors if we don't have VSX? Do we need
> > both checks? etc)
> >
> > -eric
> >
> > On Wed, Oct 8, 2014 at 1:46 PM, Bill Seurer <seurer at linux.vnet.ibm.com> wrote:
> >> Changes to fma.ll to fix merging
> >>
> >> http://reviews.llvm.org/D5362
> >>
> >> Files:
> >> /home/seurer/llvm/llvm-test/include/llvm/CodeGen/FastISel.h
> >> /home/seurer/llvm/llvm-test/lib/CodeGen/SelectionDAG/FastISel.cpp
> >> /home/seurer/llvm/llvm-test/lib/Target/PowerPC/PPCFastISel.cpp
> >> /home/seurer/llvm/llvm-test/test/CodeGen/Generic/select-cc.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/2007-09-08-unaligned.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/2012-10-12-bitcast.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/buildvec_canonicalize.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/copysignl.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fabs.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fast-isel-call.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fast-isel-conversion.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fast-isel-load-store.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fast-isel-ret.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fcpsgn.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fma.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fnabs.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fp-branch.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fp_to_uint.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fsel.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/fsqrt.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/i64_fp.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/mcm-12.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/mcm-4.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/ppc64-align-long-double.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/recipest.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/rounding-ops.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/select-cc.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/unaligned.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/unsafe-math.ll
> >> /home/seurer/llvm/llvm-test/test/CodeGen/PowerPC/vec_mul.ll
>
More information about the llvm-commits
mailing list