[PATCH] Transform 3 operand instructions to 2 operand versions of the same instruction if first 2 register operands are the same for thumb1

[Renato Golin]

================
Comment at: lib/Target/ARM/AsmParser/ARMAsmParser.cpp:5670
@@ +5669,3 @@
+                  // remove the CCOut operand as well.
+                  Operands.erase(Operands.begin() + 1);
+              }
----------------
rs wrote:
> rengolin wrote:
> > why is this necessary?
> The 3 operand 'add' is transformed to the 2 operand 'add' and the 2 operand register-register 'add' does not have a CCOut operand, so it must be removed (see line 5236 which says the same thing). 
> 
ok

================
Comment at: lib/Target/ARM/AsmParser/ARMAsmParser.cpp:5686
@@ +5685,3 @@
+     static_cast<ARMOperand &>(*Operands[2]).getReg() ==
+     static_cast<ARMOperand &>(*Operands[3]).getReg()) {
+        Operands.erase(Operands.begin() + 2);
----------------
rs wrote:
> rengolin wrote:
> > You could simplify this with a nested if
> I'm not sure what you mean, would you prefer this 'if' to be put into nested 'if''s, or do you want it to be part of the previous 'if'? 
I mean something like:

    f (isThumbOne() && Operands.size() == 5 && Mnemonic == "add" && !CarrySetting) {
        ARMOperand Op2 = static_cast<ARMOperand &>(*Operands[2]);
        ARMOperand Op3 = static_cast<ARMOperand &>(*Operands[3]);
        if (Op2.isReg() && Op3.isReg() && Op1 == Op3)
            Operands.erase(Operands.begin() + 2);
    }

================
Comment at: lib/Target/ARM/AsmParser/ARMAsmParser.cpp:8196
@@ -8151,3 +8195,3 @@
   // to be from r0-r7 when in Thumb2.
-  else if (Opc == ARM::tADDhirr && isThumbOne() &&
+  else if (Opc == ARM::tADDhirr && isThumbOne() && !hasV6MOps() &&
            isARMLowRegister(Inst.getOperand(1).getReg()) &&
----------------
rs wrote:
> rengolin wrote:
> > Can you describe why is this change needed?
> If you try to assemble 'add r1, r2' (echo 'add r1, r2' | llvm-mc --show-encoding --triple thumbv6m) you  would get the error message ' error: instruction variant requires Thumb2', this instruction is supported in v6m.
oh, ok, I read it backwards.

http://reviews.llvm.org/D5463