[llvm] r218446 - [x86] Teach the new vector shuffle lowering a fancier way to lower
Chandler Carruth
chandlerc at gmail.com
Thu Sep 25 03:21:15 PDT 2014
Author: chandlerc
Date: Thu Sep 25 05:21:15 2014
New Revision: 218446
URL: http://llvm.org/viewvc/llvm-project?rev=218446&view=rev
Log:
[x86] Teach the new vector shuffle lowering a fancier way to lower
256-bit vectors with lane-crossing.
Rather than immediately decomposing to 128-bit vectors, try flipping the
256-bit vector lanes, shuffling them and blending them together. This
reduces our worst case shuffle by a pretty significant margin across the
board.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v16.ll
llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v32.ll
llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll
llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=218446&r1=218445&r2=218446&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Sep 25 05:21:15 2014
@@ -9309,17 +9309,12 @@ static SDValue lower128BitVectorShuffle(
/// shuffles. This can be done generically for any 256-bit vector shuffle and so
/// we encode the logic here for specific shuffle lowering routines to bail to
/// when they exhaust the features avaible to more directly handle the shuffle.
-static SDValue splitAndLower256BitVectorShuffle(SDValue Op, SDValue V1,
- SDValue V2,
- const X86Subtarget *Subtarget,
+static SDValue splitAndLower256BitVectorShuffle(SDLoc DL, MVT VT, SDValue V1,
+ SDValue V2, ArrayRef<int> Mask,
SelectionDAG &DAG) {
- SDLoc DL(Op);
- MVT VT = Op.getSimpleValueType();
assert(VT.getSizeInBits() == 256 && "Only for 256-bit vector shuffles!");
assert(V1.getSimpleValueType() == VT && "Bad operand type!");
assert(V2.getSimpleValueType() == VT && "Bad operand type!");
- ShuffleVectorSDNode *SVOp = cast<ShuffleVectorSDNode>(Op);
- ArrayRef<int> Mask = SVOp->getMask();
ArrayRef<int> LoMask = Mask.slice(0, Mask.size()/2);
ArrayRef<int> HiMask = Mask.slice(Mask.size()/2);
@@ -9366,6 +9361,59 @@ static SDValue splitAndLower256BitVector
return DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Hi);
}
+/// \brief Lower a vector shuffle crossing multiple 128-bit lanes as
+/// a permutation and blend of those lanes.
+///
+/// This essentially blends the out-of-lane inputs to each lane into the lane
+/// from a permuted copy of the vector. This lowering strategy results in four
+/// instructions in the worst case for a single-input cross lane shuffle which
+/// is lower than any other fully general cross-lane shuffle strategy I'm aware
+/// of. Special cases for each particular shuffle pattern should be handled
+/// prior to trying this lowering.
+static SDValue lowerVectorShuffleAsLanePermuteAndBlend(SDLoc DL, MVT VT,
+ SDValue V1, SDValue V2,
+ ArrayRef<int> Mask,
+ SelectionDAG &DAG) {
+ // FIXME: This should probably be generalized for 512-bit vectors as well.
+ assert(VT.getSizeInBits() == 256 && "Only for 256-bit vector shuffles!");
+ int LaneSize = Mask.size() / 2;
+
+ // If there are only inputs from one 128-bit lane, splitting will in fact be
+ // less expensive. The flags track wether the given lane contains an element
+ // that crosses to another lane.
+ bool LaneCrossing[2] = {false, false};
+ for (int i = 0, Size = Mask.size(); i < Size; ++i)
+ if (Mask[i] >= 0 && (Mask[i] % Size) / LaneSize != i / LaneSize)
+ LaneCrossing[(Mask[i] % Size) / LaneSize] = true;
+ if (!LaneCrossing[0] || !LaneCrossing[1])
+ return splitAndLower256BitVectorShuffle(DL, VT, V1, V2, Mask, DAG);
+
+ if (isSingleInputShuffleMask(Mask)) {
+ SmallVector<int, 32> FlippedBlendMask;
+ for (int i = 0, Size = Mask.size(); i < Size; ++i)
+ FlippedBlendMask.push_back(
+ Mask[i] < 0 ? -1 : ((Mask[i] / LaneSize == i / LaneSize)
+ ? Mask[i]
+ : Mask[i] % LaneSize +
+ (i / LaneSize) * LaneSize + Size));
+
+ // Flip the vector, and blend the results which should now be in-lane. The
+ // VPERM2X128 mask uses the low 2 bits for the low source and bits 4 and
+ // 5 for the high source. The value 3 selects the high half of source 2 and
+ // the value 2 selects the low half of source 2. We only use source 2 to
+ // allow folding it into a memory operand.
+ unsigned PERMMask = 3 | 2 << 4;
+ SDValue Flipped = DAG.getNode(X86ISD::VPERM2X128, DL, VT, DAG.getUNDEF(VT),
+ V1, DAG.getConstant(PERMMask, MVT::i8));
+ return DAG.getVectorShuffle(VT, DL, V1, Flipped, FlippedBlendMask);
+ }
+
+ // This now reduces to two single-input shuffles of V1 and V2 which at worst
+ // will be handled by the above logic and a blend of the results, much like
+ // other patterns in AVX.
+ return lowerVectorShuffleAsDecomposedShuffleBlend(DL, VT, V1, V2, Mask, DAG);
+}
+
/// \brief Handle lowering of 4-lane 64-bit floating point shuffles.
///
/// Also ends up handling lowering of 4-lane 64-bit integer shuffles when AVX2
@@ -9381,7 +9429,8 @@ static SDValue lowerV4F64VectorShuffle(S
assert(Mask.size() == 4 && "Unexpected mask size for v4 shuffle!");
if (is128BitLaneCrossingShuffleMask(MVT::v4f64, Mask))
- return splitAndLower256BitVectorShuffle(Op, V1, V2, Subtarget, DAG);
+ return lowerVectorShuffleAsLanePermuteAndBlend(DL, MVT::v4f64, V1, V2, Mask,
+ DAG);
if (isSingleInputShuffleMask(Mask)) {
// Non-half-crossing single input shuffles can be lowerid with an
@@ -9503,7 +9552,8 @@ static SDValue lowerV8F32VectorShuffle(S
assert(Mask.size() == 8 && "Unexpected mask size for v8 shuffle!");
if (is128BitLaneCrossingShuffleMask(MVT::v8f32, Mask))
- return splitAndLower256BitVectorShuffle(Op, V1, V2, Subtarget, DAG);
+ return lowerVectorShuffleAsLanePermuteAndBlend(DL, MVT::v8f32, V1, V2, Mask,
+ DAG);
if (SDValue Blend = lowerVectorShuffleAsBlend(DL, MVT::v8f32, V1, V2, Mask,
Subtarget, DAG))
@@ -9619,18 +9669,9 @@ static SDValue lowerV16I16VectorShuffle(
// There are no generalized cross-lane shuffle operations available on i16
// element types.
- // FIXME: We should teach the "split and lower" path to do something more
- // clever, or do it ourselves here. The optimal lowering of cross-lane
- // shuffles I am aware of is to swap the lanes into a copy, shuffle both the
- // original and the copy, and then blend to pick up the cross-lane elements.
- // This is four instructions with a tree height of three which is better than
- // the worst case for a gather-cross-scatter approach such as used in SSE2
- // v8i16 lowering (where we don't have blends). While for cross-lane blends it
- // results in a blend tree, blends are very cheap in AVX2 and newer chips. We
- // might also want to special case situations where we can always do a single
- // VPERMD to produce a non-lane-crossing shuffle.
if (is128BitLaneCrossingShuffleMask(MVT::v16i16, Mask))
- return splitAndLower256BitVectorShuffle(Op, V1, V2, Subtarget, DAG);
+ return lowerVectorShuffleAsLanePermuteAndBlend(DL, MVT::v16i16, V1, V2,
+ Mask, DAG);
if (SDValue Blend = lowerVectorShuffleAsBlend(DL, MVT::v16i16, V1, V2, Mask,
Subtarget, DAG))
@@ -9691,20 +9732,11 @@ static SDValue lowerV32I8VectorShuffle(S
assert(Mask.size() == 32 && "Unexpected mask size for v32 shuffle!");
assert(Subtarget->hasAVX2() && "We can only lower v32i8 with AVX2!");
- // There are no generalized cross-lane shuffle operations available on i16
+ // There are no generalized cross-lane shuffle operations available on i8
// element types.
- // FIXME: We should teach the "split and lower" path to do something more
- // clever, or do it ourselves here. The optimal lowering of cross-lane
- // shuffles I am aware of is to swap the lanes into a copy, shuffle both the
- // original and the copy, and then blend to pick up the cross-lane elements.
- // This is four instructions with a tree height of three which is better than
- // the worst case for a gather-cross-scatter approach such as used in SSE2
- // v8i16 lowering (where we don't have blends). While for cross-lane blends it
- // results in a blend tree, blends are very cheap in AVX2 and newer chips. We
- // might also want to special case situations where we can always do a single
- // VPERMD to produce a non-lane-crossing shuffle.
if (is128BitLaneCrossingShuffleMask(MVT::v32i8, Mask))
- return splitAndLower256BitVectorShuffle(Op, V1, V2, Subtarget, DAG);
+ return lowerVectorShuffleAsLanePermuteAndBlend(DL, MVT::v32i8, V1, V2,
+ Mask, DAG);
if (SDValue Blend = lowerVectorShuffleAsBlend(DL, MVT::v32i8, V1, V2, Mask,
Subtarget, DAG))
@@ -9768,7 +9800,7 @@ static SDValue lower256BitVectorShuffle(
int ElementBits = VT.getScalarSizeInBits();
if (ElementBits < 32)
// No floating point type available, decompose into 128-bit vectors.
- return splitAndLower256BitVectorShuffle(Op, V1, V2, Subtarget, DAG);
+ return splitAndLower256BitVectorShuffle(DL, VT, V1, V2, Mask, DAG);
MVT FpVT = MVT::getVectorVT(MVT::getFloatingPointVT(ElementBits),
VT.getVectorNumElements());
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v16.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v16.ll?rev=218446&r1=218445&r2=218446&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v16.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v16.ll Thu Sep 25 05:21:15 2014
@@ -163,13 +163,11 @@ define <16 x i16> @shuffle_v16i16_00_00_
;
; AVX2-LABEL: @shuffle_v16i16_00_00_00_00_00_00_00_08_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpunpcklwd {{.*}} # xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[0,0,0,1,4,5,6,7]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm2 = xmm0[0,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpunpcklqdq {{.*}} # xmm1 = xmm2[0],xmm1[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,u,u,u,u,u,u,u,u,u,u,u,u,u,0,1,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i16> %shuffle
@@ -189,13 +187,11 @@ define <16 x i16> @shuffle_v16i16_00_00_
;
; AVX2-LABEL: @shuffle_v16i16_00_00_00_00_00_00_09_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpunpcklwd {{.*}} # xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[0,0,3,0,4,5,6,7]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm2 = xmm0[0,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpunpcklqdq {{.*}} # xmm1 = xmm2[0],xmm1[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,u,u,u,u,u,u,u,u,u,u,u,2,3,u,u,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,1,0,1,0,1,0,1,0,1,0,1,u,u,0,1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,0,0,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 9, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i16> %shuffle
@@ -216,14 +212,11 @@ define <16 x i16> @shuffle_v16i16_00_00_
;
; AVX2-LABEL: @shuffle_v16i16_00_00_00_00_00_10_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpunpcklwd {{.*}} # xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX2-NEXT: vpshufd {{.*}} # xmm1 = xmm1[0,2,2,3]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[0,3,0,0,4,5,6,7]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm2 = xmm0[0,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpunpcklqdq {{.*}} # xmm1 = xmm2[0],xmm1[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,u,u,u,u,u,u,u,u,u,4,5,u,u,u,u,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,1,0,1,0,1,0,1,0,1,u,u,0,1,0,1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,128,0,0,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 10, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i16> %shuffle
@@ -244,14 +237,11 @@ define <16 x i16> @shuffle_v16i16_00_00_
;
; AVX2-LABEL: @shuffle_v16i16_00_00_00_00_11_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpunpcklwd {{.*}} # xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX2-NEXT: vpshufd {{.*}} # xmm1 = xmm1[0,3,2,3]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[3,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm2 = xmm0[0,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpunpcklqdq {{.*}} # xmm1 = xmm2[0],xmm1[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,u,u,u,u,u,u,u,6,7,u,u,u,u,u,u,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,1,0,1,0,1,0,1,u,u,0,1,0,1,0,1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,0,0,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 0, i32 0, i32 0, i32 11, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i16> %shuffle
@@ -272,14 +262,11 @@ define <16 x i16> @shuffle_v16i16_00_00_
;
; AVX2-LABEL: @shuffle_v16i16_00_00_00_12_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpshufd {{.*}} # xmm1 = xmm1[2,3,0,1]
-; AVX2-NEXT: vpunpcklwd {{.*}} # xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[0,0,0,1,4,5,6,7]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm2 = xmm0[0,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpunpcklqdq {{.*}} # xmm1 = xmm1[0],xmm2[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,u,u,u,u,u,8,9,u,u,u,u,u,u,u,u,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,1,0,1,0,1,u,u,0,1,0,1,0,1,0,1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,0,0,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 0, i32 0, i32 12, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i16> %shuffle
@@ -300,14 +287,11 @@ define <16 x i16> @shuffle_v16i16_00_00_
;
; AVX2-LABEL: @shuffle_v16i16_00_00_13_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpshufd {{.*}} # xmm1 = xmm1[2,3,0,1]
-; AVX2-NEXT: vpunpcklwd {{.*}} # xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[0,0,3,0,4,5,6,7]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm2 = xmm0[0,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpunpcklqdq {{.*}} # xmm1 = xmm1[0],xmm2[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,u,u,u,10,11,u,u,u,u,u,u,u,u,u,u,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,1,0,1,u,u,0,1,0,1,0,1,0,1,0,1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,0,0,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 0, i32 13, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i16> %shuffle
@@ -329,15 +313,11 @@ define <16 x i16> @shuffle_v16i16_00_14_
;
; AVX2-LABEL: @shuffle_v16i16_00_14_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpshufd {{.*}} # xmm1 = xmm1[2,3,0,1]
-; AVX2-NEXT: vpunpcklwd {{.*}} # xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX2-NEXT: vpshufd {{.*}} # xmm1 = xmm1[0,2,2,3]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[0,3,0,0,4,5,6,7]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm2 = xmm0[0,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpunpcklqdq {{.*}} # xmm1 = xmm1[0],xmm2[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[u,u,12,13,u,u,u,u,u,u,u,u,u,u,u,u,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[0,1,u,u,0,1,0,1,0,1,0,1,0,1,0,1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,0,0,128,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 0, i32 14, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i16> %shuffle
@@ -359,15 +339,11 @@ define <16 x i16> @shuffle_v16i16_15_00_
;
; AVX2-LABEL: @shuffle_v16i16_15_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
-; AVX2-NEXT: vpshufd {{.*}} # xmm1 = xmm1[2,3,0,1]
-; AVX2-NEXT: vpunpcklwd {{.*}} # xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
-; AVX2-NEXT: vpshufd {{.*}} # xmm1 = xmm1[0,3,2,3]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm1 = xmm1[3,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpshuflw {{.*}} # xmm2 = xmm0[0,0,0,0,4,5,6,7]
-; AVX2-NEXT: vpunpcklqdq {{.*}} # xmm1 = xmm1[0],xmm2[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1]
-; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm1 = ymm1[14,15,u,u,u,u,u,u,u,u,u,u,u,u,u,u,16,17,16,17,16,17,16,17,16,17,16,17,16,17,16,17]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,0,1,0,1,0,1,0,1,0,1,0,1,0,1,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [0,0,128,128,128,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <16 x i16> %a, <16 x i16> %b, <16 x i32> <i32 15, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <16 x i16> %shuffle
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v32.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v32.ll?rev=218446&r1=218445&r2=218446&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v32.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v32.ll Thu Sep 25 05:21:15 2014
@@ -339,13 +339,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_16_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0]
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],zero
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm2
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vmovdqa {{.*}} # ymm1 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm1, %ymm0, %ymm2, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 16, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -365,13 +364,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_00_17_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[1],zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,u,u,1,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,0,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 17, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -391,13 +389,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_00_18_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[2],zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,u,2,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,0,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 18, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -417,13 +414,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_00_19_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[3],zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,u,u,3,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,128,128,128,0,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 19, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -443,13 +439,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_00_20_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[4],zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,u,4,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,128,128,0,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -469,13 +464,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_00_21_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[5],zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,u,u,5,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,128,0,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 21, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -495,13 +489,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_00_22_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm2[6],zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,u,6,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,128,0,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 22, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -521,13 +514,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_00_23_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[7],zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,u,7,u,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,128,0,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 23, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -547,13 +539,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_00_24_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,zero,xmm2[8],zero,zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,u,8,u,u,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,128,0,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 24, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -573,13 +564,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_00_25_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,zero,xmm2[9],zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,u,9,u,u,u,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,128,0,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 25, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -599,13 +589,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_00_26_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,zero,xmm2[10],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,u,10,u,u,u,u,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,128,0,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 26, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -625,13 +614,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_00_27_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,zero,xmm2[11],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,u,11,u,u,u,u,u,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,128,0,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 0, i32 27, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -651,13 +639,12 @@ define <32 x i8> @shuffle_v32i8_00_00_00
;
; AVX2-LABEL: @shuffle_v32i8_00_00_00_28_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,zero,xmm2[12],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,u,12,u,u,u,u,u,u,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,128,0,128,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 0, i32 28, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -677,13 +664,12 @@ define <32 x i8> @shuffle_v32i8_00_00_29
;
; AVX2-LABEL: @shuffle_v32i8_00_00_29_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,zero,xmm2[13],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0,0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,u,13,u,u,u,u,u,u,u,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,128,0,128,128,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 0, i32 29, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -703,13 +689,12 @@ define <32 x i8> @shuffle_v32i8_00_30_00
;
; AVX2-LABEL: @shuffle_v32i8_00_30_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2
-; AVX2-NEXT: vpshufb {{.*}} # xmm2 = zero,xmm2[14],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[0],zero,xmm0[0,0,0,0,0,0,0,0,0,0,0,0,0,0]
-; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm1, %ymm0, %ymm1
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX2-NEXT: vpshufb {{.*}} # ymm0 = ymm0[u,14,u,u,u,u,u,u,u,u,u,u,u,u,u,u,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [128,0,128,128,128,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 0, i32 30, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
@@ -731,15 +716,15 @@ define <32 x i8> @shuffle_v32i8_31_00_00
;
; AVX2-LABEL: @shuffle_v32i8_31_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00_00
; AVX2: # BB#0:
-; AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX2-NEXT: vpshufb %xmm1, %xmm0, %xmm1
-; AVX2-NEXT: movl $128, %eax
+; AVX2-NEXT: vperm2i128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX2-NEXT: movl $15, %eax
; AVX2-NEXT: vmovd %eax, %xmm2
-; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm2
-; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0
-; AVX2-NEXT: vpshufb {{.*}} # xmm0 = xmm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
-; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
-; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm3, %ymm3, %ymm3
+; AVX2-NEXT: vinserti128 $0, %xmm2, %ymm3, %ymm2
+; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1
+; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0
+; AVX2-NEXT: vmovdqa {{.*}} # ymm2 = [0,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]
+; AVX2-NEXT: vpblendvb %ymm2, %ymm1, %ymm0, %ymm0
; AVX2-NEXT: retq
%shuffle = shufflevector <32 x i8> %a, <32 x i8> %b, <32 x i32> <i32 31, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <32 x i8> %shuffle
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll?rev=218446&r1=218445&r2=218446&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v4.ll Thu Sep 25 05:21:15 2014
@@ -28,10 +28,9 @@ define <4 x double> @shuffle_v4f64_0020(
define <4 x double> @shuffle_v4f64_0300(<4 x double> %a, <4 x double> %b) {
; ALL-LABEL: @shuffle_v4f64_0300
; ALL: # BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
-; ALL-NEXT: vblendpd {{.*}} # xmm1 = xmm0[0],xmm1[1]
-; ALL-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0]
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; ALL-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[0,1,2,2]
+; ALL-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
ret <4 x double> %shuffle
@@ -51,10 +50,8 @@ define <4 x double> @shuffle_v4f64_1000(
define <4 x double> @shuffle_v4f64_2200(<4 x double> %a, <4 x double> %b) {
; ALL-LABEL: @shuffle_v4f64_2200
; ALL: # BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
-; ALL-NEXT: vunpcklpd {{.*}} # xmm1 = xmm1[0,0]
-; ALL-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0]
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; ALL-NEXT: vperm2f128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; ALL-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,0,2,2]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
ret <4 x double> %shuffle
@@ -63,10 +60,10 @@ define <4 x double> @shuffle_v4f64_2200(
define <4 x double> @shuffle_v4f64_3330(<4 x double> %a, <4 x double> %b) {
; ALL-LABEL: @shuffle_v4f64_3330
; ALL: # BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
-; ALL-NEXT: vshufpd {{.*}} # xmm0 = xmm1[1],xmm0[0]
-; ALL-NEXT: vmovhlps {{.*}} # xmm1 = xmm1[1,1]
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; ALL-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[1,1,2,2]
+; ALL-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,0,3,2]
+; ALL-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0,1],ymm0[2],ymm1[3]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
ret <4 x double> %shuffle
@@ -75,10 +72,8 @@ define <4 x double> @shuffle_v4f64_3330(
define <4 x double> @shuffle_v4f64_3210(<4 x double> %a, <4 x double> %b) {
; ALL-LABEL: @shuffle_v4f64_3210
; ALL: # BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
-; ALL-NEXT: vpermilpd {{.*}} # xmm1 = xmm1[1,0]
-; ALL-NEXT: vpermilpd {{.*}} # xmm0 = xmm0[1,0]
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; ALL-NEXT: vperm2f128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; ALL-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[1,0,3,2]
; ALL-NEXT: retq
%shuffle = shufflevector <4 x double> %a, <4 x double> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
ret <4 x double> %shuffle
@@ -300,10 +295,9 @@ define <4 x i64> @shuffle_v4i64_0112(<4
define <4 x i64> @shuffle_v4i64_0300(<4 x i64> %a, <4 x i64> %b) {
; AVX1-LABEL: @shuffle_v4i64_0300
; AVX1: # BB#0:
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vblendpd {{.*}} # xmm1 = xmm0[0],xmm1[1]
-; AVX1-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX1-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[0,1,2,2]
+; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm0[0],ymm1[1,2,3]
; AVX1-NEXT: retq
;
; AVX2-LABEL: @shuffle_v4i64_0300
@@ -333,10 +327,8 @@ define <4 x i64> @shuffle_v4i64_1000(<4
define <4 x i64> @shuffle_v4i64_2200(<4 x i64> %a, <4 x i64> %b) {
; AVX1-LABEL: @shuffle_v4i64_2200
; AVX1: # BB#0:
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vunpcklpd {{.*}} # xmm1 = xmm1[0,0]
-; AVX1-NEXT: vunpcklpd {{.*}} # xmm0 = xmm0[0,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,0,2,2]
; AVX1-NEXT: retq
;
; AVX2-LABEL: @shuffle_v4i64_2200
@@ -350,10 +342,10 @@ define <4 x i64> @shuffle_v4i64_2200(<4
define <4 x i64> @shuffle_v4i64_3330(<4 x i64> %a, <4 x i64> %b) {
; AVX1-LABEL: @shuffle_v4i64_3330
; AVX1: # BB#0:
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vshufpd {{.*}} # xmm0 = xmm1[1],xmm0[0]
-; AVX1-NEXT: vmovhlps {{.*}} # xmm1 = xmm1[1,1]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX1-NEXT: vpermilpd {{.*}} # ymm1 = ymm1[1,1,2,2]
+; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[0,0,3,2]
+; AVX1-NEXT: vblendpd {{.*}} # ymm0 = ymm1[0,1],ymm0[2],ymm1[3]
; AVX1-NEXT: retq
;
; AVX2-LABEL: @shuffle_v4i64_3330
@@ -367,10 +359,8 @@ define <4 x i64> @shuffle_v4i64_3330(<4
define <4 x i64> @shuffle_v4i64_3210(<4 x i64> %a, <4 x i64> %b) {
; AVX1-LABEL: @shuffle_v4i64_3210
; AVX1: # BB#0:
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vpermilpd {{.*}} # xmm1 = xmm1[1,0]
-; AVX1-NEXT: vpermilpd {{.*}} # xmm0 = xmm0[1,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm0 = ymm0[2,3,0,1]
+; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[1,0,3,2]
; AVX1-NEXT: retq
;
; AVX2-LABEL: @shuffle_v4i64_3210
@@ -530,14 +520,16 @@ define <4 x i64> @shuffle_v4i64_4015(<4
define <4 x i64> @stress_test1(<4 x i64> %a, <4 x i64> %b) {
; AVX1-LABEL: @stress_test1
; AVX1: # BB#0:
-; AVX1-NEXT: vpermilpd {{.*}} # xmm0 = xmm1[1,0]
-; AVX1-NEXT: vpermilpd {{.*}} # xmm0 = xmm0[1,0]
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm0 = ymm1[2,3,0,1]
+; AVX1-NEXT: vpermilpd {{.*}} # ymm2 = ymm0[1,0,3,2]
+; AVX1-NEXT: vblendpd {{.*}} # ymm1 = ymm2[0],ymm1[1],ymm2[2,3]
; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1
-; AVX1-NEXT: vmovhlps {{.*}} # xmm1 = xmm1[1,1]
; AVX1-NEXT: vpermilpd {{.*}} # xmm1 = xmm1[1,0]
-; AVX1-NEXT: vblendpd {{.*}} # xmm1 = xmm1[0],xmm0[1]
+; AVX1-NEXT: vpermilpd {{.*}} # ymm0 = ymm0[1,1,3,2]
; AVX1-NEXT: vpermilpd {{.*}} # xmm0 = xmm0[1,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vblendpd {{.*}} # xmm0 = xmm0[0],xmm1[1]
+; AVX1-NEXT: vpermilpd {{.*}} # xmm1 = xmm1[1,0]
+; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX1-NEXT: retq
;
; AVX2-LABEL: @stress_test1
Modified: llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll?rev=218446&r1=218445&r2=218446&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vector-shuffle-256-v8.ll Thu Sep 25 05:21:15 2014
@@ -49,11 +49,10 @@ define <8 x float> @shuffle_v8f32_000030
define <8 x float> @shuffle_v8f32_00040000(<8 x float> %a, <8 x float> %b) {
; ALL-LABEL: @shuffle_v8f32_00040000
; ALL: # BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
-; ALL-NEXT: vshufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
-; ALL-NEXT: vshufps {{.*}} # xmm1 = xmm0[0,0],xmm1[2,0]
-; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0]
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; ALL-NEXT: vpermilps {{.*}} # ymm1 = ymm1[0,0,0,0,4,4,4,4]
+; ALL-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,0,3,4,4,4,7]
+; ALL-NEXT: vblendps {{.*}} # ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7]
; ALL-NEXT: retq
%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 0, i32 4, i32 0, i32 0, i32 0, i32 0>
ret <8 x float> %shuffle
@@ -62,11 +61,10 @@ define <8 x float> @shuffle_v8f32_000400
define <8 x float> @shuffle_v8f32_00500000(<8 x float> %a, <8 x float> %b) {
; ALL-LABEL: @shuffle_v8f32_00500000
; ALL: # BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
-; ALL-NEXT: vshufps {{.*}} # xmm1 = xmm1[1,0],xmm0[0,0]
-; ALL-NEXT: vshufps {{.*}} # xmm1 = xmm0[0,0],xmm1[0,2]
-; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0]
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; ALL-NEXT: vpermilps {{.*}} # ymm1 = ymm1[u,u,1,u,4,4,4,4]
+; ALL-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,2,0,4,4,6,4]
+; ALL-NEXT: vblendps {{.*}} # ymm0 = ymm0[0,1],ymm1[2],ymm0[3],ymm1[4,5,6,7]
; ALL-NEXT: retq
%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 0, i32 5, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <8 x float> %shuffle
@@ -75,11 +73,10 @@ define <8 x float> @shuffle_v8f32_005000
define <8 x float> @shuffle_v8f32_06000000(<8 x float> %a, <8 x float> %b) {
; ALL-LABEL: @shuffle_v8f32_06000000
; ALL: # BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
-; ALL-NEXT: vshufps {{.*}} # xmm1 = xmm1[2,0],xmm0[0,0]
-; ALL-NEXT: vshufps {{.*}} # xmm1 = xmm1[2,0],xmm0[0,0]
-; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0]
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; ALL-NEXT: vpermilps {{.*}} # ymm1 = ymm1[u,2,u,u,4,4,4,4]
+; ALL-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,1,0,0,4,5,4,4]
+; ALL-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4,5,6,7]
; ALL-NEXT: retq
%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 0, i32 6, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <8 x float> %shuffle
@@ -88,11 +85,10 @@ define <8 x float> @shuffle_v8f32_060000
define <8 x float> @shuffle_v8f32_70000000(<8 x float> %a, <8 x float> %b) {
; ALL-LABEL: @shuffle_v8f32_70000000
; ALL: # BB#0:
-; ALL-NEXT: vextractf128 $1, %ymm0, %xmm1
-; ALL-NEXT: vshufps {{.*}} # xmm1 = xmm1[3,0],xmm0[0,0]
-; ALL-NEXT: vshufps {{.*}} # xmm1 = xmm1[0,2],xmm0[0,0]
-; ALL-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0]
-; ALL-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; ALL-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; ALL-NEXT: vpermilps {{.*}} # ymm1 = ymm1[3,u,u,u,4,4,4,4]
+; ALL-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,0,0,4,4,4,4]
+; ALL-NEXT: vblendps {{.*}} # ymm0 = ymm1[0],ymm0[1,2,3],ymm1[4,5,6,7]
; ALL-NEXT: retq
%shuffle = shufflevector <8 x float> %a, <8 x float> %b, <8 x i32> <i32 7, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
ret <8 x float> %shuffle
@@ -619,11 +615,10 @@ define <8 x i32> @shuffle_v8i32_00003000
define <8 x i32> @shuffle_v8i32_00040000(<8 x i32> %a, <8 x i32> %b) {
; AVX1-LABEL: @shuffle_v8i32_00040000
; AVX1: # BB#0:
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vshufps {{.*}} # xmm1 = xmm1[0,0],xmm0[0,0]
-; AVX1-NEXT: vshufps {{.*}} # xmm1 = xmm0[0,0],xmm1[2,0]
-; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX1-NEXT: vpermilps {{.*}} # ymm1 = ymm1[0,0,0,0,4,4,4,4]
+; AVX1-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,0,3,4,4,4,7]
+; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0,1,2],ymm1[3,4,5,6,7]
; AVX1-NEXT: retq
;
; AVX2-LABEL: @shuffle_v8i32_00040000
@@ -638,11 +633,10 @@ define <8 x i32> @shuffle_v8i32_00040000
define <8 x i32> @shuffle_v8i32_00500000(<8 x i32> %a, <8 x i32> %b) {
; AVX1-LABEL: @shuffle_v8i32_00500000
; AVX1: # BB#0:
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vshufps {{.*}} # xmm1 = xmm1[1,0],xmm0[0,0]
-; AVX1-NEXT: vshufps {{.*}} # xmm1 = xmm0[0,0],xmm1[0,2]
-; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX1-NEXT: vpermilps {{.*}} # ymm1 = ymm1[u,u,1,u,4,4,4,4]
+; AVX1-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,2,0,4,4,6,4]
+; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0,1],ymm1[2],ymm0[3],ymm1[4,5,6,7]
; AVX1-NEXT: retq
;
; AVX2-LABEL: @shuffle_v8i32_00500000
@@ -657,11 +651,10 @@ define <8 x i32> @shuffle_v8i32_00500000
define <8 x i32> @shuffle_v8i32_06000000(<8 x i32> %a, <8 x i32> %b) {
; AVX1-LABEL: @shuffle_v8i32_06000000
; AVX1: # BB#0:
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vshufps {{.*}} # xmm1 = xmm1[2,0],xmm0[0,0]
-; AVX1-NEXT: vshufps {{.*}} # xmm1 = xmm1[2,0],xmm0[0,0]
-; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX1-NEXT: vpermilps {{.*}} # ymm1 = ymm1[u,2,u,u,4,4,4,4]
+; AVX1-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,1,0,0,4,5,4,4]
+; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm0[0],ymm1[1],ymm0[2,3],ymm1[4,5,6,7]
; AVX1-NEXT: retq
;
; AVX2-LABEL: @shuffle_v8i32_06000000
@@ -676,11 +669,10 @@ define <8 x i32> @shuffle_v8i32_06000000
define <8 x i32> @shuffle_v8i32_70000000(<8 x i32> %a, <8 x i32> %b) {
; AVX1-LABEL: @shuffle_v8i32_70000000
; AVX1: # BB#0:
-; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
-; AVX1-NEXT: vshufps {{.*}} # xmm1 = xmm1[3,0],xmm0[0,0]
-; AVX1-NEXT: vshufps {{.*}} # xmm1 = xmm1[0,2],xmm0[0,0]
-; AVX1-NEXT: vpermilps {{.*}} # xmm0 = xmm0[0,0,0,0]
-; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
+; AVX1-NEXT: vperm2f128 {{.*}} # ymm1 = ymm0[2,3,0,1]
+; AVX1-NEXT: vpermilps {{.*}} # ymm1 = ymm1[3,u,u,u,4,4,4,4]
+; AVX1-NEXT: vpermilps {{.*}} # ymm0 = ymm0[0,0,0,0,4,4,4,4]
+; AVX1-NEXT: vblendps {{.*}} # ymm0 = ymm1[0],ymm0[1,2,3],ymm1[4,5,6,7]
; AVX1-NEXT: retq
;
; AVX2-LABEL: @shuffle_v8i32_70000000
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