[llvm] r218358 - R600/SI: Enable named operand table for SALU instructions

Matt Arsenault Matthew.Arsenault at amd.com
Tue Sep 23 19:17:06 PDT 2014


Author: arsenm
Date: Tue Sep 23 21:17:06 2014
New Revision: 218358

URL: http://llvm.org/viewvc/llvm-project?rev=218358&view=rev
Log:
R600/SI: Enable named operand table for SALU instructions

Modified:
    llvm/trunk/lib/Target/R600/SIInstrFormats.td

Modified: llvm/trunk/lib/Target/R600/SIInstrFormats.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIInstrFormats.td?rev=218358&r1=218357&r2=218358&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIInstrFormats.td (original)
+++ llvm/trunk/lib/Target/R600/SIInstrFormats.td Tue Sep 23 21:17:06 2014
@@ -164,6 +164,8 @@ class SOP2 <bits<7> op, dag outs, dag in
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
+
+  let UseNamedOperandTable = 1;
 }
 
 class SOPC <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
@@ -174,6 +176,8 @@ class SOPC <bits<7> op, dag outs, dag in
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
+
+  let UseNamedOperandTable = 1;
 }
 
 class SOPK <bits<5> op, dag outs, dag ins, string asm, list<dag> pattern> :
@@ -183,6 +187,8 @@ class SOPK <bits<5> op, dag outs, dag in
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
+
+  let UseNamedOperandTable = 1;
 }
 
 class SOPP <bits<7> op, dag ins, string asm, list<dag> pattern> :
@@ -192,6 +198,8 @@ class SOPP <bits<7> op, dag ins, string
   let mayStore = 0;
   let hasSideEffects = 0;
   let SALU = 1;
+
+  let UseNamedOperandTable = 1;
 }
 
 class SMRD <bits<5> op, bits<1> imm, dag outs, dag ins, string asm,





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