[PATCH] [AArch64] Enable partial unrolling and runtime unrolling for AArch64 target

Eric Christopher echristo at gmail.com
Mon Sep 22 10:10:19 PDT 2014


Looks like the chip itself has a 32 entry loop buffer (with 2 forward and one backward branch support). What range of values did you check here? (i.e. why is 32 not the right value to put here like with the other port specific constants?)

http://reviews.llvm.org/D5148






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