[Thumb] Don't materialize a new base register when CPSR is live

[Moritz Roth]

>> I also increased the neighbourhood size
>> for computeRegisterLiveness slightly (10->15), as it turned out that
>quite
>> often, CPSR liveness was undecidable in the default neighbourhood.
>
>This seems a bit arbitrary... Though, I'm not sure how you could
>detect it otherwise.

I agree, that number is quite arbitrary :/ I chose it based on looking at
a selection of test cases. Basically, it's a compile-time /
optimization opportunity trade-off, so this might profit from some
adjustments. I'll do some compile-time measurements to see what the impact
of this is, compared to how many more LDM/STMs we can merge.

>> Regarding the tests, you're right - I found this while working on
>making the
>> load/store merging more aggressive (currently, we only do it if it's
>> obviously safe) - the register allocator inserted some spills between
>a CMP
>> and Bcc which could be merged, but it isn't possible to safely
>materialize
>> the base+offset there. Unfortunately, with the algorithm that's
>currently
>> checked in, the STRs in that case aren't merged at all, and it's
>somewhat
>> dependent on register allocation...
>
>I'm ok with this going in like that, but would be good to add a test
>for it when the next patch lands. Would also be good to add a comment
>to that effect on the commit message, so that people know why the
>commit has no tests.

Ok, I added a comment to the commit message. Once my next patch is ready
I'll try to reduce the test into something small (for the record, it was
in LNT/oggenc).

For now, it's committed as r217881.

Thanks for the review!
Cheers
Moritz

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