[PATCH] [InstCombine] Attempt to eliminate redundant loads whose addresses are dependent on the result of a select instruction.

[David Majnemer]

On Wed, Sep 3, 2014 at 1:24 PM, Tilmann Scheller <t.scheller at samsung.com>
wrote:

> Hi,
>
> attached is the following patch:
>
> [PATCH] [InstCombine] Attempt to eliminate redundant loads whose addresses
> are dependent on the result of a select instruction.
>
> If both values have already been loaded into registers the load becomes
> redundant and can be replaced with a select on the two values instead, e.g.
> we can do the following transformation:
>
> a = (load (gep idx_a))
> b = (load (gep idx_b))
> c = (load (gep (select (cond, idx_a, idx_b))))
>   -->
> a = (load (gep idx_a))
> b = (load (gep idx_b))
> c = (select (cond, a, b))
>
>
>
> This particular pattern occurs in the hottest loop of 175.vpr from SPEC
> CPU2000. Haven't done any measurements yet but I would assume it improves
> performance (GCC is doing the above optimization and is ~10% faster on ARM)
>
> This is my first patch for InstCombine, feedback welcome :)
>

Hi Tilmann,

I don't think this a natural place to do this, I'm of the opinion that we
should try to get GVN to do this sort of thing.


>
> Regards,
>
> Tilmann
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20140903/3bf44efe/attachment.html>