[PATCH] R600/SI: Add a pattern for i64 and in a branch

[Matt Arsenault]

On Sep 2, 2014, at 12:55 PM, Tom Stellard <thomas.stellard at amd.com> wrote:

> ---
> lib/Target/R600/SIInstructions.td |  1 +
> test/CodeGen/R600/and.ll          | 20 ++++++++++++++++++++
> 2 files changed, 21 insertions(+)
> 
> diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td
> index 47ca42c..71792d1 100644
> --- a/lib/Target/R600/SIInstructions.td
> +++ b/lib/Target/R600/SIInstructions.td
> @@ -1897,6 +1897,7 @@ class BinOp64Pat <SDNode node, Instruction inst> : Pat <
>                   (EXTRACT_SUBREG i64:$src1, sub1)), sub1)
>> ;
> 
> +def : BinOp64Pat <and, V_AND_B32_e32>;
> def : BinOp64Pat <or, V_OR_B32_e32>;
> def : BinOp64Pat <xor, V_XOR_B32_e32>;
> 
> diff --git a/test/CodeGen/R600/and.ll b/test/CodeGen/R600/and.ll
> index e20037e..7bbbec2 100644
> --- a/test/CodeGen/R600/and.ll
> +++ b/test/CodeGen/R600/and.ll
> @@ -108,6 +108,26 @@ define void @v_and_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addr
>   ret void
> }
> 
> +; FUNC-LABEL: @v_and_i64_br
> +; SI: V_AND_B32
> +; SI: V_AND_B32
> +define void @v_and_i64_br(i64 addrspace(1)* %out, i64 addrspace(1)* %aptr, i64 addrspace(1)* %bptr, i32 %cond) {
> +entry:
> +  %tmp0 = icmp eq i32 %cond, 0
> +  br i1 %tmp0, label %if, label %endif
> +
> +if:
> +  %a = load i64 addrspace(1)* %aptr, align 8
> +  %b = load i64 addrspace(1)* %bptr, align 8
> +  %and = and i64 %a, %b
> +  br label %endif
> +
> +endif:
> +  %tmp1 = phi i64 [%and, %if], [0, %entry]
> +  store i64 %tmp1, i64 addrspace(1)* %out, align 8
> +  ret void
> +}
> +
> ; FUNC-LABEL: @v_and_constant_i64
> ; SI: V_AND_B32
> ; SI: V_AND_B32
> -- 
> 1.8.5.5
> 
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LGTM