[llvm] r216880 - ARM] Add Thumb-2 code size optimization regression test for BIC.

Tilmann Scheller t.scheller at samsung.com
Mon Sep 1 05:53:29 PDT 2014


Author: tilmann
Date: Mon Sep  1 07:53:29 2014
New Revision: 216880

URL: http://llvm.org/viewvc/llvm-project?rev=216880&view=rev
Log:
ARM] Add Thumb-2 code size optimization regression test for BIC.

Modified:
    llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll

Modified: llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll?rev=216880&r1=216879&r2=216880&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/thumb2-size-opt.ll Mon Sep  1 07:53:29 2014
@@ -27,3 +27,13 @@ entry:
   %shr = ashr i32 %a, %b
   ret i32 %shr
 }
+
+define i32 @bic(i32 %a, i32 %b) nounwind readnone {
+; CHECK-LABEL: bic:
+; CHECK: bic.w r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} @ encoding: [{{0x..,0x..,0x..,0x..}}]
+; CHECK-OPT: bics r{{[0-7]}}, r{{[0-7]}} @ encoding: [{{0x..,0x..}}]
+entry:
+  %neg = xor i32 %b, -1
+  %and = and i32 %neg, %a
+  ret i32 %and
+}





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