[PATCH] [AArch64] Fix an ISEL failure around half float data type
liujiangning1 at gmail.com
Thu Aug 28 02:00:50 PDT 2014
This patch is to fix an ISEL failure around half float data type. The fix covers two things,
1) Some bitcast patterns around v8f16 are missing in AArch64 back-end.
2) The promotion of v8f16 to v8i16 for the operand of load/store is missing. Since for little-end we only generate ldr/str, we can use big-endian to capture the failure exposed by pattern match for instruction ld1/st1.
-------------- next part --------------
A non-text attachment was scrubbed...
Size: 4768 bytes
Desc: not available
More information about the llvm-commits