[llvm] r216040 - [FastISel][AArch64] Use the proper FMOV instruction to materialize a +0.0.

[Juergen Ributzka]

Author: ributzka
Date: Tue Aug 19 20:10:36 2014
New Revision: 216040

URL: http://llvm.org/viewvc/llvm-project?rev=216040&view=rev
Log:
[FastISel][AArch64] Use the proper FMOV instruction to materialize a +0.0.

Use FMOVWSr/FMOVXDr instead of FMOVSr/FMOVDr, which have the proper register
class to be used with the zero register. This makes the MachineInstruction
verifier happy again.

This is related to <rdar://problem/18027157>.

Modified:
    llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp
    llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll

Modified: llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp?rev=216040&r1=216039&r2=216040&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64FastISel.cpp Tue Aug 19 20:10:36 2014
@@ -291,7 +291,7 @@ unsigned AArch64FastISel::AArch64Materia
     // register, because the immediate version of fmov cannot encode zero.
     if (Val.isPosZero()) {
       unsigned ZReg = Is64Bit ? AArch64::XZR : AArch64::WZR;
-      unsigned Opc = Is64Bit ? AArch64::FMOVDr : AArch64::FMOVSr;
+      unsigned Opc = Is64Bit ? AArch64::FMOVXDr : AArch64::FMOVWSr;
       BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), ResultReg)
         .addReg(ZReg, getKillRegState(true));
       return ResultReg;

Modified: llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll?rev=216040&r1=216039&r2=216040&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-fast-isel-materialize.ll Tue Aug 19 20:10:36 2014
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -fast-isel-abort -mtriple=arm64-apple-darwin < %s | FileCheck %s
+; RUN: llc -O0 -fast-isel-abort -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
 
 ; Materialize using fmov
 define float @fmov_float1() {