[PATCH] Improve Cost model for SLPVectorizer when we have a vector division by power of 2

[hfinkel at anl.gov]

----- Original Message -----
> From: "Sanjay Patel" <spatel at rotateright.com>
> To: "kv bhat" <kv.bhat at samsung.com>, nrotem at apple.com, aschwaighofer at apple.com, hfinkel at anl.gov
> Cc: spatel at rotateright.com, llvm-commits at cs.uiuc.edu
> Sent: Tuesday, August 19, 2014 12:34:33 PM
> Subject: Re: [PATCH] Improve Cost model for SLPVectorizer when we have a vector division by power of 2
> 
> ================
> Comment at: lib/Target/X86/X86TargetTransformInfo.cpp:208
> @@ +207,3 @@
> +          {ISD::SDIV, MVT::v16i16, 1}, // psraw instruction
> +          {ISD::UDIV, MVT::v16i16, 1}, // psraw instruction
> +          {ISD::SDIV, MVT::v8i32, 1},  // psrad instruction
> ----------------
> udiv should become a logical shift left: "vpsrld" or "vpsrlw" with
> AVX2. With SSE, it's "psrld" or "psrlw" (just remove the leading
> 'v').
> 
> sdiv is handled with a sequence of logical shift left, add, algebraic
> shift left. The cost should be the sum of those ops?

The costs are really about throughput. I'd imagine that it will only really be the sum if there is a single dependency chain, no uop fusion, etc. Likely best to measure it.

 -Hal

> 
> http://reviews.llvm.org/D4971
> 
> 
>

http://reviews.llvm.org/D4971