[PATCH] Improve Cost model for SLPVectorizer when we have a vector division by power of 2

[Sanjay Patel]

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Comment at: lib/Target/X86/X86TargetTransformInfo.cpp:208
@@ +207,3 @@
+          {ISD::SDIV, MVT::v16i16, 1}, // psraw instruction
+          {ISD::UDIV, MVT::v16i16, 1}, // psraw instruction
+          {ISD::SDIV, MVT::v8i32, 1},  // psrad instruction
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udiv should become a logical shift left: "vpsrld" or "vpsrlw" with AVX2. With SSE, it's "psrld" or "psrlw" (just remove the leading 'v').

sdiv is handled with a sequence of logical shift left, add, algebraic shift left. The cost should be the sum of those ops?

http://reviews.llvm.org/D4971